Literature Licensing Buy On-Line Download Entire Site Part Number Knowledge DB

Home   |   Products   |   Support   |   End Markets   |   Technology Center   |   Education & Events   |   Corporate   |   Buy On-Line

Knowledge Database   |   Devices   |   Design Software   |   Intellectual Property   |   Design Examples   |   mySupport   |   Reference Designs

FPGAs       Stratix IV (E and GX)       Stratix III       Stratix II/Stratix II GX       Stratix/Stratix GX       Arria GX       Cyclone III       Cyclone II       Cyclone     CPLDs       MAX II       MAX 3000A       MAX 7000     ASICs       HardCopy III       HardCopy II       HardCopy Stratix       HardCopy APEX 20K     Downloads       Device Pin-Outs       Gerber Files       IBIS Models    BSDL/BST           IEEE 1149.1           IEEE 1532       PCB Symbols     Configuration/Programming    Configuration    Programming    Programming Tools     Power    Power Management       Early Power Estimators       Certified Power Solutions     I/O       Features       Specifications       Hot Socketing     PLL & Clock Management       Overview       PLL Basics       Using PLLs in Software       Jitter Information       Clock Networks       Glossary     Packaging & Board Design       Specification       Thermal Resistance       Sockets and Layout       Manufacturing     Quality & Reliability       MSL Calculator       Certifications    Environmental       PCNs & Advisories    Reports       Single Event Upset     Failure Analysis       Overview       Capabilities

Home > Support > Devices > BSDL/BST > APEX II BSDL Files Print This Page Subscribe to Email APEX II BSDL Files Browse boundary-scan description language (BSDL) files by specific devices and choose the appropriate device package. The same BSDL file can be used regardless of speed grade or temperature. IEEE 1149.1 Compliant APEX II BSDL Files (1) Device Package File Code Version EP2A15 672-pin FineLine BGA EP2A15F672 3.00 724-pin BGA EP2A15B724 3.00 EP2A25 672-pin FineLine BGA EP2A25F672 3.00 724-pin BGA EP2A25B724 3.00 EP2A40 1020-pin FineLine BGA EP2A40F1020 3.00 672-pin FineLine BGA EP2A40F672 3.00 724-pin BGA EP2A40B724 3.00 EP2A70 1508-pin FineLine BGA EP2A70F1508 3.00 724-pin BGA EP2A70B724 3.00 Note to Table:   (1) The BSDL Files are syntax checked using these tools: JTAG Technologies ASSET Intertech - Agilent Technologies Corelis Goepel electronic Temento Systems Questions or concerns about the contents of these files, can be directed to Altera's mySupport. For information on boundary-scan testing, refer to the Related Documents links on Altera BSDL Support page. Rate This Page

Please Give Us Feedback

Home | Products | Support | End Markets | Technology Center | Education & Events | Corporate | Buy On-Line  Knowledge Database | Devices | Design Software | Intellectual Property | Design Examples | mySupport | Reference Designs  Contact Us | Site Help | Site Map | Privacy | Legal Notice  Copyright © 1995-2008 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA Altera, Stratix, Arria, Cyclone, MAX, HardCopy, Nios, Quartus and MegaCore are trademarks of Altera Corporation