FPGA, CPLD, and ASIC solutions from Altera
  • Download Center
  • Literature
Sign in/register
myAltera Account
Welcome
  •   myAltera
  •   Logout
  • Products
    • Devices
    • Design Software
    • Intellectual Property
    • Development Kits/Cables
    • Design & Support Services
    • Literature
  • End Markets
    • Automotive
    • Broadcast
    • Computer & Storage
    • Consumer
    • Industrial
    • Medical
    • Military
    • Test & Measurement
    • Wireless
    • Wireline
  • Technology
    • DSP
    • External Memory
    • Embedded Processing
    • Transceivers
    • Parallel I/O
    • Signal Integrity
    • System Integration
  • Training
    • Training Courses
    • University Program
    • Webcasts & Videos
    • Demonstrations
    • Events Calendar
  • Support
    • Design & Support Resources
    • Knowledge Database
    • Devices
    • Design Software
    • Intellectual Property
    • Development Kits/Cables
    • Design Examples
    • Downloads
    • User Communities/Forums
    • mySupport
  • About Altera
    • About Us
    • Environmental
    • Customer Successes
    • Partners
    • Newsroom
    • Investor Relations
    • Jobs
    • Contact Us
  • Buy Online
    • Devices
    • Design Software
    • Development & Education Kits
    • Cables & Programming Hardware
    • Intellectual Property
  • Entire Site
  • Part Number
  • Knowledge Database
  • Support & Technical Docs
  • Forums & Wiki
Username:  
Password:  
 
Forgot my username or password
Don't have myAltera account? Register Now.
Enter your email address:

Stratix & Stratix GX Device Family Technical Information

Home > Support > Devices > Stratix/Stratix GX

Learn to Configure Stratix II GX FPGA Transceivers in Quartus II Software

Open your eyes - Visit the Signal Integrity Center

Watch the Stratix II GX FPGA Flash Movie

For information about the Stratix® device family, visit the Stratix Device Family home page. For information about the Stratix GX device family, visit the Stratix GX Device Family home page.

Data Sheets & Pin-Outs

  • Stratix Device Family Data Sheet (PDF) in the Stratix Device Handbook
  • Stratix Device Pin-Outs
  • Stratix FPGA Family Errata Sheet (PDF)
  • Stratix GX Device Data Sheet (PDF)

Device Information

  • Stratix Device Family Literature
  • Stratix Device Questions & Answers
  • Stratix GX Device Family Literature
  • Stratix GX Device Questions & Answers
  • I/O Standards & Interfaces Solutions Center
  • Memory Solutions Center
  • Reconfigurable DSP Solutions Center

Documentation Highlights

  • Using General-Purpose PLLs in Stratix & Stratix GX Devices (PDF) chapter of the Stratix Device Handbook
  • Using High-Speed Differential I/O Interfaces in Stratix Devices (PDF) chapter of the Stratix Device Handbook
  • AN 306: Implementing Multipliers in FPGA Devices (PDF)
  • The Benefits of Altera’s High-Speed DDR SDRAM Memory Interface Solution White Paper (PDF)
  • Using Pre-Emphasis & Equalization With Stratix GX White Paper (PDF)

Programming & Configuration

  • Configuring Stratix & Stratix GX Devices (PDF) chapter of the Stratix Device Handbook
  • Using Altera Enhanced Configuration Devices (PDF) chapter of the Configuration Device Handbook
  • Using Remote System Configuration With Stratix & Stratix GX Devices (PDF) chapter of the Stratix Device Handbook 
  • FPGA Configuration Troubleshooter

Software Support

  • Quartus® II Software Literature
  • Quartus II Software Overview
  • Quartus II Software Support

Packaging & Operation

  • Package Information for Stratix Devices (PDF) chapter of the Stratix Device Handbook
  • Altera Device Package Information Data Sheet (PDF)
  • Reliability Report (PDF)
  • Stratix PowerPlay Early Power Estimator
  • Stratix GX PowerPlay Early Power Estimator

Design & Production

  • On-Chip Termination Update for Stratix & Stratix GX
  • Board Design Guidelines Solutions Center
  • Signal Integrity Center
  • BSDL File Download
  • IBIS Models

Part Numbers & Ordering Information

  • Altera Part Number Format
  • Purchasing Altera Devices

View the complete listing of Stratix Device Family Literature or Stratix GX Device Family Literature.

Rate This Page


  • FPGAs
    • Stratix IV (E, GX, GT)
    • Stratix III
    • Stratix II/Stratix II GX
    • Stratix/Stratix GX
    • Arria II GX
    • Arria GX
    • Cyclone IV (E and GX)
    • Cyclone III
    • Cyclone II
    • Cyclone
  • CPLDs
    • MAX II
    • MAX 3000A
    • MAX 7000
  • ASICs
    • HardCopy IV
    • HardCopy III
    • HardCopy II
    • HardCopy Stratix
    • HardCopy APEX
  • Downloads
    • Device Pin-Outs
    • Gerber Files
    • IBIS Models
    • BSDL/BST
      • IEEE 1149.1
      • IEEE 1149.6
      • IEEE 1532
    • PCB Symbols
    • Schematic Review Worksheets
  • Configuration/Programming
    • Configuration
      • Schemes
        • AP
        • AS
        • FPP
        • JTAG
        • PPA
        • PPS
        • PS
      • Comparison
      • Features
      • Solutions
    • Programming
      • MAX II
      • MAX 3000A
      • MAX 7000
      • Configuration Devices
    • Programming Tools
      • Altera Programming Tools
        • Download Cables
        • Altera Programming Unit
        • Altera Programming SW
      • In-Circuit Testers
        • ICT Vendors
      • Boundary-Scan Tools
        • Vendor Support
      • Third Party
      • IEEE 1532
      • Jam STAPL
        • Embedded Programming
        • Vendor Support
  • Power
    • Power Management
      • Overview
      • Thermal Management
      • Power Supply Integrity
      • Power Supply Regulation
    • Early Power Estimators
    • Certified Power Solutions
  • I/O
    • Features
    • Specifications
    • Hot Socketing
  • PLL & Clock Management
    • Overview
    • PLL Basics
    • Using PLLs in Software
    • Jitter Information
    • Clock Networks
    • Glossary
  • Packaging & Board Design
    • Specification
    • Thermal Resistance
    • Sockets and Layout
    • Manufacturing
  • Quality & Reliability
    • MSL Calculator
    • Certifications
    • Environmental
      • Policy Statement
      • Banned Chemicals
      • REACH
      • RoHS Compliant
        • Alloy Compositions
        • EU Directive Compliance
        • Chinese RoHS
    • PCNs & Advisories
    • Reports
      • Reliability Report
      • Process Technology
      • JEDEC Compliance
    • Single Event Upset
  • Failure Analysis
    • Overview
    • Capabilities
    Please give us feedback
    Products | End Markets | Technology | Training | Support | About Altera | Buy Online
    Jobs | Investor Relations | Contact Us | Site Map | Privacy | Legal Notice
    Copyright © 1995-2010 Altera Corporation. All Rights Reserved.
    Altera Forum
    Altera
    Forum
    Twitter
    Twitter
    RSS
    RSS
    Facebook
    Facebook
    Flickr
    Flickr
    YouTube
    YouTube
    Email Updates
    Email
    Updates