The following examples provide instructions for implementing functions using AHDL. For more information on AHDL, refer to MAX+PLUS II Help.
- Cycle-Shared Dual-Port RAM (
csdpram) - Cycle-Shared First-In First-Out (FIFO) Function (
csfifo) - Parameterized Counter (
lpm_counter) - Parameterized Multiplier (
lpm_mult) - Parameterized Multiplexer (
lpm_mux) - Parameterized RAM with Separate Input & Output Ports (
lpm_ram_dq) - Parameterized Tri-State Bus (
lpm_bustri) - Creating a Hierarchical Design
- Tri-State Buses Connected to a Bidirectional Bus
- Tri-State Buses Converted to a Multiplexer
How to Use AHDL Examples
AHDL examples are displayed in text format in your web browser. To use an AHDL example in your MAX+PLUS II project, you can "cut and paste" the text from your web browser into the MAX+PLUS II Text Editor. Make sure that the file name of the Text Design File (.tdf) corresponds to the subdesign name in the example. For instance, if the subdesign name is myram, you should save the file as myram.tdf.
Design Examples Disclaimer
These design examples may only be used within Altera Corporation devices and remain the property of Altera. They are being provided on an “as-is” basis and as an accommodation; therefore, all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera.
