Complex Multiplier Design Example v1.0.0 README File This readme file contains the following sections: o Package Contents o Tool Requirements o Description of Design Example o Simulation in Simulink o Release History o Design Examples Disclaimer o Contacting Altera Package Contents ================ Complex Multiplier Design Example v1.0.0 Design files include: o complex_mult_C_DSP_Block.mdl - DSP Builder design file implementing 18x18 complex multiplier with variable coefficient o init.m - MATLAB script to initialize the sampling time, and simulation time o complex_mul.m - MATLAB script to verify the simulation results in Simulink Tool Requirements ================= This design example requires the following software package: o Quartus II 5.0 o DSP Builder v5.0.0 o MATLAB/Simulink R14 SP2 Please contact your local sales representative if you do not have one of these software tools. Description of Design Example ============================= This is a 18x18 complex multiplier implemented using the dedicated DSP Blocks with variable coefficients. It uses the canonical representation requiring 3 multipliers, 3 adders and 2 subtractors: D = Dr + j*Di { Data } C = Cr + j*Ci { Coefficient } R = D*C = Rr + j*Ri  { Result } Rr = Dr*Cr – Di*Ci {same as conventional representation} Rr = Dr*Cr – Di*Ci + (Dr*Ci - Di*Cr) - (Dr*Ci - Di*Cr) Rr = (Dr*Cr – Dr*Ci + Di*Cr - Di*Ci) + (Dr*Ci - Di*Cr) Rr = ((Dr + Di)*(Cr - Ci)) + (Dr*Ci - Di*Cr) Ri = Dr*Ci + Di*Cr {same as conventional representation} To get more details on the discrete blocks in DSP Builder, refer to the DSP Builder Reference Manual located at: http://www.altera.com/literature/manual/mnl_dsp_builder.pdf Simulation in Simulink ====================== To run the simulation of the design example in Simulink, perform the following steps: 1. Open the complex_mult_C_DSP_Block.mdl file. 2. To review the simulation parameters, select "Configuration Parameters" (Simulation menu). The Stop Time is set by the variable "simtime", initialized in the init.m file. 3. To start simulation, select "Start" (Simulation menu). At the end of simulation, the design runs a MATLAB script: complex_mul.m to verify if the simulation results are correct. If they are, it will generate a "Passed" message in the MATLAB workspace with the number of simulation data compared. Otherwise, it will generate a "Fail" message. To get more details on the design flow using DSP Builder, refer to the DSP Builder User Guide located at: http://www.altera.com/literature/ug/ug_dsp_builder.pdf Release History =============== Version 1.0.0 ------------- Initial release Design Examples Disclaimer ========================== These design examples may only be used within Altera Corporation devices and remain the property of Altera. They are being provided on an “as-is” basis and as an accommodation; therefore, all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera. Contacting Altera ================= Although we have made every effort to ensure that this design example works correctly, there might be problems that we have not encountered. If you have a question or problem that is not answered by the information provided in this readme file or the example's documentation, please contact your Altera Field Applications Engineer. If you have additional questions that are not answered in the documentation provided with this function, please contact Altera Applications: World-Wide Web: http://www.altera.com http://www.altera.com/mysupport/ Technical Support Hotline: (800) 800-EPLD (U.S.) (408) 544-7000 (Internationally) Copyright (c) 2005 Altera Corporation. All rights reserved.