Custom Read-Write Masters Design
---------------------------------------------

This design requires the following development board:

  - Nios Development Board Cyclone II Edition
  - Nios Development Board Stratix II RoHS Edition

This design requires the following software tools:

  - Quartus II 7.2 or later
  - Nios II EDS 7.2 or later
  - MegaCore IP Library 7.2 or later


Running the Design
-------------------------
To run the design on Cyclone II 2C35 or Stratix II 2s60 RoHS Nios Development Board:

1. Extract the archived contents to a location of your choice in harddrive, this is refered as <project_folder>
2. Open Quartus II software. Click File -> Open Project. Browse to <project_folder> and select the custom_dma.qpf project file.
3. Click Tools -> Programmer to bring up the Quartus II programmer utility. Make sure the custom_dma.sof file is selected. Click on Start to download the .sof 
    to FPGA. (Click on Add File if the sof is not selected)
4. Open Nios II IDE software. Click File -> Import.
5. Expand Altera Nios II folder and select Existing Nios II IDE project into workspace, then click Next.
6. Browse to <project_folder>/software/custom_dma directory and click OK.
7. Click Finish after that is done.
8. Repeat steps 4 to 7 again for folder named custom_dma_syslib in the same software directory.
    Note: Please make sure the target ptf file is set to correct path and with correct cpu being selected.
9. Right click on the project and select Build Project.
10. Once the project is successfully built, right click the project again and select Run As -> Nios II Hardware. 
      Note: Please make sure the sof file is downloaded to FPGA before running the software. If this is not done, please repeat step 3.
For more information on the software code, please refer to the comments written in the source files.


Quartus II Compilation
------------------------------
If you wish to recompile the design in Quartus II software, please follow these steps:

1. With the project has been open in Quartus II software, click Tools -> SOPC Builder. Click Generate in the opened SOPC Builder.
2. Click Processing -> Start Compilation. This may takes a while.

*Note:  If you make design changes you make need to increase the Quartus II fitter settings to allow for more timing margin.


Design Examples Disclaimer
-------------------------------------

These design examples may only be used within Altera Corporation devices and remain 
the property of Altera. They are being provided on an “as-is” basis and as an accommodation; 
therefore, all warranties, representations, or guarantees of any kind (whether express, 
implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, 
or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, 
suggest, or require that these examples be used in combination with any other product not provided 
by Altera.


Contacting Altera
----------------------

Although we have made every effort to ensure that this design example works 
correctly, there might be problems that we have not encountered. If you have 
a question or problem that is not answered by the information provided in this 
readme file or the example's documentation, please contact your Altera Field 
Applications Engineer.

If you have additional questions that are not answered in the documentation
provided with this function, please contact Altera Applications:

World-Wide Web:                 http://www.altera.com
                                http://www.altera.com/mysupport/
Technical Support Hotline:	(800) 800-EPLD (U.S.)
                                (408) 544-7000 (Internationally)
                                
Copyright (c) 2007 Altera Corporation. All rights reserved.