Half Band Interpolating Filter Design Example v1.0.0 README File


This readme file contains the following sections:

o  Package Contents
o  Tool Requirements
o  Description of Design Example
o  Simulation in Simulink
o  Release History
o  Design Examples Disclaimer
o  Contacting Altera



Package Contents
================

Half Band Interpolating Filter Design Example v1.0.0
Design files include:
	o HBF_DA_TDM_Reloadable_Coef.mdl - DSP Builder design file implementing the interpolating half-band filter
	  with reloadable coefficients
	o init.m - MATLAB script to initialize the sampling time, and simulation time and coefficients.  The script also
          generates the stimulus: chirp and impulse.
	o compute_partial_product.m - MATLAB script to calculate the partial products based on the initial filter
          coefificient values set in init.m.  Two sets of partial products are calculated for each coefficient value: 
          one for the MSB segment and the other for the LSB segment of the data.  Since the design uses the concept of
          time domain multiplexing, each LUT stores the partital product for 2 coefficients.  



Tool Requirements
=================

This design example requires the following software package:
	o Quartus II 5.0
	o DSP Builder v5.0.0
	o MATLAB/Simulink R14 SP2
	 
Please contact your local sales representative if you do not have one of these
software tools.



Description of Design Example
=============================

This is an interpolating by 2 half-band filter with 79 taps (40 none-zero coefficients).
Taking advantage of the symmetrical filter coefficients and the concept of time-domain multiplexing (TDM),
the design requires only 10 multipliers.  The multipliers are implemented using distributed arithmetic (DA)
where the partial products are stored in the M4K TriMatrix memory blocks.  The design also supports reloading 
of the filter coefficients.  

The coefficients are stored as partial products in the M4K TriMatrix memory blocks.  The M4K memory blocks
are configured as 128x32 dual-port RAMs. To reload a new coefficient set, assert the coef_reload bit and keep 
it high throughout the entire reload period. The partial products for the coefficients need to be precomputed.  
Refer to the compute_partial_product.m script for details.  While reloading the coefficients, the filtering 
operation is halted.


To get more details on the discrete blocks in DSP Builder, refer to the DSP Builder Reference Manual 
located at:

http://www.altera.com/literature/manual/mnl_dsp_builder.pdf

To get more details on the soft multipliers (DA using TriMatrix Memory Blocks), refer to
AN 306: Techniques for Implementing Multipliers in Stratix, Stratix GX, and Cyclone Devices
located at:

http://www.altera.com/literature/an/an306.pdf



Simulation in Simulink
======================

To run the simulation of the design example in Simulink, perform the following steps:
1.  Open the HBF_DA_TDM_Reloadable_Coef.mdl file. When the deisgn is loaded, it runs the init.m MATLAB script.
    The script plots the filter response based on two sets of stimulus: impulse and chirp. You will compare these
    filter results with the simulation results later.
2.  To review the simulation parameters, select "Configuration Parameters" (Simulation menu).  The Stop Time
    is set by the variable "simtime", initialized in the init.m file.
3.  Choose the stimulus (Chirp or impulse) by clicking on the two-way switch which feeds the input_data[] port.
3.  To start simulation, select "Start" (Simulation menu).  

At the end of simulation, double-click on the scope to view the simulation results.


To get more details on the design flow using DSP Builder, refer to the DSP Builder User Guide 
located at:

http://www.altera.com/literature/ug/ug_dsp_builder.pdf



Release History
===============

Version 1.0.0
-------------

Initial release  



Design Examples Disclaimer
==========================

These design examples may only be used within Altera Corporation devices and remain 
the property of Altera. They are being provided on an “as-is” basis and as an accommodation; 
therefore, all warranties, representations, or guarantees of any kind (whether express, 
implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, 
or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, 
suggest, or require that these examples be used in combination with any other product not provided 
by Altera.



Contacting Altera
=================

Although we have made every effort to ensure that this design example works 
correctly, there might be problems that we have not encountered. If you have 
a question or problem that is not answered by the information provided in this 
readme file or the example's documentation, please contact your Altera Field 
Applications Engineer.

If you have additional questions that are not answered in the documentation
provided with this function, please contact Altera Applications:

World-Wide Web:                 http://www.altera.com
                                http://www.altera.com/mysupport/
Technical Support Hotline:	(800) 800-EPLD (U.S.)
                                (408) 544-7000 (Internationally)
                                
Copyright (c) 2005 Altera Corporation. All rights reserved.