Image Frame Resizing Using Scaler Design Example
This design example shows how to resize a video frame using Altera's Scaler MegaCore® function in DSP Builder. The various sizes of video and image display devices make scaling one of the most commonly used techniques in video and image processing. In this design example, the Scaler MegaCore function clips the input video based on the width, height, and X and Y offset values and resizes the video to a bigger resolution using bi-cubic interpolation.
The model consists of an image stream source block, a scaler block, and an image stream sink block. The image stream source block reads an input binary file corresponding to a 176 x 144 video clip and feeds the data stream to the scaler block. The scaler block takes a 112 x 80 clip of the input video with an X and Y offset of 10 pixels. The output video is expanded to 256 x 192 using 2D Cubic interpolation. The last stage of the example is an image stream sink block, which writes the interpolated data stream to an output binary file. The output binary file can be converted to an .avi file for display using the provided utility. The values for clipped image size and offsets and output resolution are arbitrary and for illustration purposes. You can modify this example to meet your needs. For a complete video system design using the Altera® VIP suite for video and image processing, refer to the Video Processing Reference Design web page and AN 427: Video and Image Processing Up Conversion Example Design (PDF).
Download the files used in this example:
Files in the zip download include:
- example.mdl—DSP Builder design file
- scaler.vhd—Wrapper file to generate Altera's Scaler intellectual property (IP) MegaCore function
- avi-is-avi.exe—DOS executable to convert an .avi file to and from a binary file
Figure 1 shows the top-level diagram of an image frame resizing using the Scaler MegaCore function in DSP Builder.
Figure 1. Image Frame Resizing Using Scaler Design Example
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Table 1 lists the ports and gives a description for each.
| Table 1. Scaler Port Listing |
| Port Name |
Type |
Description |
din_data[7:0] |
Input |
Data input bus |
din_valid |
Input |
Data valid signal that indicates the validity of the input data signals |
dout_ready |
Input |
Data output ready signal |
reset |
Input |
Reset signal |
din_ready |
Output |
Data input ready signal |
dout_data[7:0] |
Output |
Data output bus |
dout_valid |
Output |
Data valid signal that indicates the validity of the output data signals |
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