Arithmetic Design Examples
Table 1 contains arithmetic design examples for use in designs for Altera® devices. Select the design entry method icon to see the design example.
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Table 1. Arithmetic Design Examples
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| Function |
Design Entry Method |
Adder/Subtractor  |
  |
| Binary Adder Tree |
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| Ternary Adder Tree |
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| Examples for altfp_add_sub Megafunction User Guide |
 |
| Examples for altmult_add Megafunction User Guide |
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Parameterized Counter (lpm_counter)
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|
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Behavorial Counter
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Carry Look-Ahead Adder
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Ripple-Carry Adder
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|
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Down Counter
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Legacy Examples
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Parameterized Multiplier (lpm_mult)
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Parameterized Counter (lpm_counter)
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The following icons indicate the entry mode(s) used in each example:
- Altera hardware description language (AHDL)
- VHDL
- MAX+PLUS® II Graphic Editor
- Verilog hardware description language (HDL)
 Tool command language (Tcl)- Quartus® II development tool
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Literature
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