Interface protocols enable chip-to-chip, board-to-board, or box-to-box connectivity in system designs. Protocol intellectual property (IP) solutions from Altera and our partners satisfy the needs of a broad spectrum of applications and leverage the integrated transceivers in our FPGA and ASIC devices. Interface protocol solutions are delivered as licensable IP cores and reference designs as well as no-cost megafunctions and design examples.
Visit our Transceiver Protocols section to learn more about the integrated transceivers and their supporting interface protocol solutions.
|Device Targeted||Development Kits Supported||SOPC Builder Ready||Qsys Compliant||Quartus II Version|
Design Examples Disclaimer
These design examples may only be used within Altera Corporation devices and remain the property of Altera. They are being provided on an "as-is" basis and as an accommodation; therefore, all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera.