Tri-State Buses in Altera Devices
Altera devices do not have internal tri-state buses. Consequently, logic inside a device cannot communicate via bidirectional lines. However, MAX+PLUS® II can emulate tri-state buses by using multiplexers and by routing the bidirectional line outside of the device and then back in through another pin.
This example shows the following two methods for using tri-state buses in Altera Devices:
- Using Tri-States Buses to Multiplex Signals Together
- Using Tri-States Buses for Bidirectional Communication
The use of this design is governed by, and subject to, the terms and conditions of the Altera Hardware Reference Design License Agreement.
Using Tri-State Buses to Multiplex Signals Together
When tri-state buses are used to multiplex signals, MAX+PLUS II will convert the logic to a combinatorial multiplexer. The method shown in Figure 1 cannot be performed inside an Altera device because each tri-state buffer can only feed one pin. This design will be converted automatically by MAX+PLUS II into a multiplexer that feeds a single tri-state buffer (see Figure 2). MAX+PLUS II can perform this tri-state emulation automatically for both Graphic Editor and Altera Hardware Description Language (AHDL) designs. Refer to Graphic Editor: Tri-State Buses Converted to a Multiplexer and AHDL: Tri-State Buses Converted to a Multiplexer for more information.
Figure 1. Internally Connected Tri-States
Figure 2. Multiplexer
If the tri-state buffers do not feed a pin, then no tri-state buffer is available after the multiplexer (see Figure 3).
Figure 3. Internally Connected Tri-States Without I/O Pins
If the design in Figure 3 is entered using AHDL or Graphic Editor, MAX+PLUS II will automatically convert it into the design in Figure 4. If the design in Figure 3 is entered using VHDL, you will need to manually create a multiplexer.
Figure 4. Multiplexer Without I/O Pins
In Figure 5, device 1 communicates with device 2 via bidirectional lines. This can be performed inside an Altera PLD since there is a tri-state buffer available at each I/O pin.
Figure 5. Bidirectional Communication Between Two Altera Devices
In Figure 6, logic A communicates with logic B via bidirectional lines inside the device. Since tri-states do not feed into the device, this function cannot be implemented in this manner. To overcome this, you can rout this bidirectional line outside of the device (see Figure 7), which uses the tri-states present at the I/O pins, or you can convert the tri-state bus into a multiplexer (see Figure 8). MAX+PLUS II can convert internal tri-state buses into multiplexeres independently for both AHDL and Graphic Editor designs. Refer to Graphic Editor: Tri-State Buses Converted to a Multiplexer and AHDL: Tri-State Buses Converted to a Multiplexer.
Figure 6. Bidirectional Lines Inside the Device
Figure 7. Bidirectional Line Routed Outside of the Device
Figure 8. Multiplexer Controlling Feedback Lines
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