Quartus II Design Example: Examples for altpll Megafunction User Guide
The altpll Megafunction User Guide offers two design examples that use the altpll megafunction to:
- Generate an external differential clock from an enhanced PLL (as shown in Figure 1)
- Generate and modify internal clock signals (as shown in Figure 2)
The following downloadable projects and files are used in this example:
Figure 1. Completed DDR_CLK.bdf Diagram
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Figure 2. Completed shift_clk.bdf Diagram
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For more information on using this example, go to:
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