Verilog HDL: Two-Dimensional FIR Filter
Finite impulse response (FIR) filtering for video applications and image processing is used in many applications, including noise removal, image sharpening, and feature extraction.
In the case of noise removal, the goal is to reduce the effects of undesirable, contaminative signals that have been linearly added to the image. By applying a low-pass filter or smoothing function the image is flattened, thereby reducing the rapid pixel-to-pixel variation in gray levels and ultimately removing noise. On the other hand, image sharpening focuses on the fine details of the image and enhances sharp transitions between the pixels. This acts as a high-pass filter that reduces broad features in an image, such as the uniform background, and enhances compact features or details that have been blurred.
All of the operations mentioned above involve transformation of the input image. This can be presented as the convolution of the two-dimensional input image, x(m,n) with the impulse response of the transform, f(k,l), resulting in y(m,n), which is the output image. The basic equation is shown in Figure 1.
Figure 1: Transformation of Input Image 
The f(k,l) function refers to the matrix of filter coefficients. Depending on the type of operation and the choice of the convolutional kernel or mask, f(k,l) is different.
This 3x3 two-dimensional FIR filter design takes in an 8x8 input image with gray pixel values ranging from 0-255 (8-bit) and outputs an 8x8 output image. The output needs to be scaled back to the grayscale range if necessary. For more details, see the Implementing High-Performance DSP Functions in Stratix & Stratix GX Devices chapter of the Stratix Device Handbook.
Download the files used in this example:
Files in the download include:
- two_d_filter.v - Top-level design file
- control.v - Provides RAM control signals to interleave data across three RAM blocks
- buffer.v - Stores input image in three separate RAM blocks using M512
- mux_ram_row.v - Checks for edge pixels and uses free boundary condition
- filter.v - Implements nine multiply-add operations in parallel using DSP blocks
- two_d_fir.m - MATLAB script using the 'conv2' utility to verify the functionality of design
Figure 2 shows the two_d_filter top-level block diagram.
Figure 2. two_d_filter Top-Level Block Diagram
Table 1 contains the two-dimensional FIR filter design example port listing.
| Table 1. Two-Dimensional FIR Filter Design Example Port Listing |
| Port Name |
Type |
Description |
| data[7..0] |
Input |
The input is an 8-bit unsigned grayscale value (0-255). Data is fed in serially starting from the top left pixel, moving horizontally on a row-by-row basis. |
| coefx_x[8..0] |
Input |
Filter coefficients are 9-bit signed integers |
| clk |
Input |
Clock |
| clken |
Input |
Clock enable |
| aclr |
Input |
Asynchronous clear |
| data_valid |
Input |
If data_valid is high, the filter starts operating on the information available on the data[] port. Otherwise, the filter is idle. The data_valid port needs to be asserted throughout the entire stream of 64 inputs. |
| result[20..0] |
Output |
Output of the two-dimensional FIR filter needs to be scaled back to the grayscale range if necessary. |
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