VHDL: Carry Look-Ahead Adder
This example implements an 8-bit carry look-ahead adder by
recursively expanding the carry term to each stage. Recursive expansion allows
the carry expression for each individual stage to be implemented
in a two-level AND-OR expression. This reduces the carry signal
propagation delay (the limiting factor in a standard ripple carry
adder) to produce a high-performance addition circuit.
Altera recommendeds using the lpm_add_sub function to implement an adder. This example is provided to show an adder implementation that does not require the LPM.
This design works best in a FLEX device compiled using the Fast synthesis style in MAX+PLUS II. To compile the project using the Fast synthesis style:
- Choose Global Project Logic Synthesis (Assign Menu). The Global Project Logic Synthesis dialog box is displayed.
- Select Define Sythesis Style.
- Choose Fast from the Style drop-down list box.
c_l_addr.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY c_l_addr IS
PORT
(
x_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
y_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
carry_in : IN STD_LOGIC;
sum : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
carry_out : OUT STD_LOGIC
);
END c_l_addr;
ARCHITECTURE behavioral OF c_l_addr IS
SIGNAL h_sum : STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL carry_generate : STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL carry_propagate : STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL carry_in_internal : STD_LOGIC_VECTOR(7 DOWNTO 1);
BEGIN
h_sum <= x_in XOR y_in;
carry_generate <= x_in AND y_in;
carry_propagate <= x_in OR y_in;
PROCESS (carry_generate,carry_propagate,carry_in_internal)
BEGIN
carry_in_internal(1) <= carry_generate(0) OR (carry_propagate(0) AND carry_in);
inst: FOR i IN 1 TO 6 LOOP
carry_in_internal(i+1) <= carry_generate(i) OR (carry_propagate(i) AND carry_in_internal(i));
END LOOP;
carry_out <= carry_generate(7) OR (carry_propagate(7) AND carry_in_internal(7));
END PROCESS;
sum(0) <= h_sum(0) XOR carry_in;
sum(7 DOWNTO 1) <= h_sum(7 DOWNTO 1) XOR carry_in_internal(7 DOWNTO 1);
END behavioral;
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Altera does not warrant that this solution will work for the customer's intended purpose and disclaims all liability for use of or reliance on the solution.
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