VHDL
The following examples provide instructions for implementing functions using VHDL. For more information on VHDL, refer to Quartus® II or MAX+PLUS® II software Help.
VHDL Embedded Processor Functions
 Standard Nios® II Hardware Design Example- Full-Featured Nios II Hardware Design Example
- Small Nios II Hardware Design Example
- Fast Nios II Hardware Design Example
- Low-Cost Nios II Hardware Design Example
VHDL Arithmetic Functions
- Adder/Subtractor
- Carry Look-Ahead Adder
- Down Counter (
lpm_counter)
- Behavioral Counter
- Ripple-Carry Adder
VHDL Memory Functions
- Dual Clock Synchronous RAM
- Single Clock Synchronous RAM
- Single Clock Synchronous RAM With Asynhcronous Read Address
- Cycle-Shared Dual-Port RAM (
csdpram)
- Zero-Bus Turnaround (ZBT) Controller
- Quad Data Rate (QDR) SRAM Controller
VHDL Bus and I/O Functions
- Bidirectional Bus
- Tri-State Buses
VHDL Logic Functions
- 8x64 Shift Register With Taps
- Counter With Synchronous Load
- Preventing Unintentional Latch Creation
- Instantiating a DFFE
- Instantiating a DFF Using lpm_dff
VHDL Digital Signal Processing (DSP) Functions
- Cyclic Prefix Insertion for OFDM Systems
- Viterbi Decoder With Node Synchronization
- Signed Multiplier
- Signed Multiply-Accumulator
- Unsigned Multiplier With Registered I/O
- Unsigned Multiply-Adder
Other VHDL Functions
- Creating a Hierachical Design
- Converting a Hexadecimal Value to a Standard Logic Vector
How to Use VHDL Examples
Altera provides VHDL design examples as downloadable executable files or as text in your web browser. Click the executable file link to download the file to your hard disk. To use VHDL examples displayed as text in your Quartus II or MAX+PLUS II software, copy and paste the text from your web browser into the Quartus II or MAX+PLUS II software Text Editor. Make sure that the file name of the VHDL design file (.vhd) corresponds to the entity name in the example. For instance, if the entity name is myram, you should save the file as myram.vhd.
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