Altera provides extensive support for the 10-Gbps Ethernet Reference Design intellectual property (IP) to help you quickly and easily develop and debug 10-Gbps Ethernet applications.
10-Gbps Ethernet IP
The 10-Gbps Ethernet Reference Design IP does not come with the Quartus® II software; you must install it manually.
- Download the IP: 10-Gbps Ethernet Reference Design
- Learn about the reference design: AN 516: 10-Gbps Ethernet Reference Design (PDF)
Literature
- 10-Gbps Ethernet IP User Guide (PDF)
- 10-Gbps Ethernet IP Datasheet (PDF)
- Getting Started with the 10-Gbps Ethernet IP (PDF)
- 10-Gbps Ethernet IP Functional Description (PDF)
Application Notes
- AN 561: Stratix® II GX 10GbE Loopback Reference Design (PDF)10-Gps Ethernet IP Datasheet (PDF)
Design Examples
- 10-Gbps Ethernet Hardware Demonstration Reference Design—Stratix IV GX FPGAs
- Stratix II GX 10-Gbps Ethernet Loopback Reference Design
Online Training Courses
- 10Gb Ethernet Design with Altera®40-nm Devices
- Chinese Version: 10/100/1000 Mb & 10Gb Ethernet Design with Stratix IV GX FPGAs
Development Kits
The following development kits are available for the 10-Gbps Ethernet Reference Design:
- Stratix IV GX FPGA Development Kit
- Stratix III FPGA Development Kit
- PCI Express Development Kit, Stratix II GX Edition
- Arria® II GX FPGA Development Kit
