FPGA, CPLD, and ASIC solutions from Altera
  • Download Center
  • Literature
Sign in/register
myAltera Account
Welcome
  •   myAltera
  •   Logout
  • Products
    • Devices
    • Design Software
    • Intellectual Property
    • Development Kits/Cables
    • Design & Support Services
    • Literature
  • End Markets
    • Automotive
    • Broadcast
    • Computer & Storage
    • Consumer
    • Industrial
    • Medical
    • Military
    • Test & Measurement
    • Wireless
    • Wireline
  • Technology
    • DSP
    • External Memory
    • Embedded Processing
    • Transceivers
    • Parallel I/O
    • Signal Integrity
    • System Integration
  • Training
    • Training Courses
    • University Program
    • Webcasts & Videos
    • Demonstrations
    • Events Calendar
  • Support
    • Design & Support Resources
    • Knowledge Database
    • Devices
    • Design Software
    • Intellectual Property
    • Development Kits/Cables
    • Design Examples
    • Downloads
    • User Communities/Forums
    • mySupport
  • About Altera
    • About Us
    • Environmental
    • Customer Successes
    • Partners
    • Newsroom
    • Investor Relations
    • Jobs
    • Contact Us
  • Buy Online
    • Devices
    • Design Software
    • Development & Education Kits
    • Cables & Programming Hardware
    • Intellectual Property
  • Entire Site
  • Part Number
  • Knowledge Database
  • Support & Technical Docs
  • Forums & Wiki
Username:  
Password:  
 
Forgot my username or password
Don't have myAltera account? Register Now.
Enter your email address:

Serial Digital Interface (SDI) IP Core Resource Center

Home > Support > Intellectual Property > SDI

Altera provides extensive documentation and support for the Serial Digital Interface (SDI) MegaCore function to help you quickly and easily develop and debug SDI applications.

Literature

  • SDI MegaCore Function User Guide (PDF)
  • MegaCore IP Library Release Notes and Errata (PDF)
  • Archive of Intellectual Property Release Notes
  • Archive of Intellectual Property Errata Sheets
  • 3-Gbps SDI Video (SMPTE 424M) white paper (PDF)
  • The Quest for Digital Broadcast Quality: Addressing Quality Hot Spots white paper (PDF)
  • Implementing a Multirate Uncompressed Video Interface for Broadcast Applications white paper (PDF)

Application Notes

  • AN 339: SDI Demonstration for Stratix II GX Devices (PDF)
  • AN 551: SDI-ASI Auto Detect Reference Design for Stratix II GX Devices (PDF)
  • AN 569: SDI Flywheel Video Decoder Reference Design for Stratix II GX Devices (PDF)
  • AN 587: DPRIO and Multiple Instances SDI Application (PDF)
  • AN 600: Serial Digital Interface Reference Design for Stratix IV GX Devices (PDF)
  • AN 601: Serial Digital Interface Reference Design for Arria II GX Devices (PDF)

Reference Designs

  • Triple-Rate SDI Reference Design for Stratix II GX Devices
  • Triple-Rate SDI Reference Design for Stratix IV GX Devices
  • Triple-Rate SDI Reference Design for Arria II GX Devices
  • SDI-PCIe Bridging Reference Design

Altera Knowledge Database

The Knowledge Database provides support solutions, answers to frequently asked questions, and information about known issues regarding the SDI MegaCore function.

See frequently viewed solutions:

  • What is the reset sequence of the SDI RX instance in the SDI MegaCore function?
  • When using the SDI RX and TX MegaCore function (independent RX & TX instances packed into the same channel), can I reset only the RX instance (during detect video format change)?
  • How is the FIFO being used during the transfer of rx_data from the RX SDI MegaCore to tx_data of the TX SDI MegaCore?
  • Can I use rx_clk output from RX SDI MegaCore as input to tx_serial_refclk of TX SDI MegaCore during parallel video signal loopback?
  • How are the SDI independent TX and independent RX instances placed or merged into one physical channel?

Find additional solutions for the SDI MegaCore function.

Online Training Courses

  • Triple-Rate SDI

Development Kits

The following development kits are available for the SDI MegaCore function:

  • Audio Video Development Kit, Stratix II GX Edition
  • Audio Video Development Kit, Stratix IV GX Edition (with SDI HSMC daughtercard)
  • Arria II GX FPGA Development Kit

Related Links

  • Altera Forum
  • OpenCore Plus support
  • Installation and licensing support resources
  • Altera’s Triple-Rate SDI solution block diagram and SDI solutions for different Altera device families
  • Altera broadcast audio/video solutions (development kits and reference designs)
  • Altera's video serial digital interface solutions
  • Broadcast literature
  • SMPTE website
Rate This Page


  • Embedded Processors
    • Nios II Embedded Design Suite
      • Release Notes
      • Errata Sheets
      • Software Development
      • Literature
    • Nios II Development Kits
  • DSP
    • Overview
    • DSP Builder
    • IP Cores
    • Development Kits
  • Interface Protocols
    • PCI Express
    • POS-PHY Level 4
    • SDI
    • Triple Speed Ethernet
    • 10-Gbps Ethernet
    • RapidIO
    Please give us feedback
    Products | End Markets | Technology | Training | Support | About Altera | Buy Online
    Jobs | Investor Relations | Contact Us | Site Map | Privacy | Legal Notice
    Copyright © 1995-2010 Altera Corporation. All Rights Reserved.
    Altera Forum
    Altera
    Forum
    Twitter
    Twitter
    RSS
    RSS
    Facebook
    Facebook
    Flickr
    Flickr
    YouTube
    YouTube
    Email Updates
    Email
    Updates