Solution ID: rd04012009_593
Last Modified: Sep 20, 2011
Product Category: Intellectual Property
Product Area: Comm, Interface & Peripherals
Product Sub-area: Core Behavior / Operation
Software: N/A
Device Family: N/A
IP Product: SDI Video Interface
Title
What is the reset sequence of the SDI RX instance in the SDI MegaCore function?
Description
The reset sequence of the SDI RX instance in the SDI MegaCore® function is outlined in the following steps and in the following timing diagram:
1. The function resets the RX transceiver (analog and digital reset are asserted) after detecting a change in the data rate.
2. The function asserts 'sdi_start_reconfig' (high) signal input to ALT2GXB_reconfig block. During reset state, the RX reconfiguration is in progress.
3. After reconfiguration completes, the ALT2GXB_RECONFIG block asserts the ‘sdi_reconfig_done’ signal. Analog reset of RX MegaCore should be deasserted.
4. When CDR PLL locks to received data (HD/3G mode) or reference clock (SD mode) successfully, digital reset of RX MegaCore is deasserted so that RX can continue processing valid data.
Figure 1. Reset Sequence
View full size
Related Solutions
Feedback
Altera does not warrant that this solution will work for the customer's intended purpose and disclaims all liability for use of or reliance on the solution.
