Solution ID: rd06172009_33
Last Modified: Jun 24, 2010
Product Category: Intellectual Property
Product Area: Other (Intellectual Property)
Product Sub-area: Other (IP)
IP Product: Triple Speed Ethernet MAC
Title
Why does the Altera Triple Speed Ethernet (TSE) MegaCore function have an error during synthesis?
Description
The Altera® Triple Speed Ethernet (TSE) MegaCore® function may have one of the following errors during synthesis:
1. Error: Following WYSIWYG I/O primitives are not properly connected to top level pins
2. Error: padio port of the output WYSIWYG I/O primitive
"tse_mac_rgmii:inst|altera_tse_mac:altera_tse_mac_inst|altera_tse_top_gen_host:top_gen_host_inst|altera_tse_rgmii_module:U_RGMII|altera_tse_ rgmii_out1:the_rgmii_out1|altddio_out:altddio_out_component|ddio_out_dub:auto_generated|dataout[0]" is not directly connected to a top-level output pin.
3. Error: padio port of the input WYSIWYG I/O primitive
"tse_mac_rgmii:inst|altera_tse_mac:altera_tse_mac_inst|altera_tse_top_gen_host:top_gen_host_inst|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_ in1:the_rgmii_in1|altddio_in:altddio_in_component|ddio_in_d9e:auto_generated|ddio_ina[0]" is not directly connected to a top-level input pin
The errors are caused by connectivity issues in top level file of TSE MAC with RGMII interface. In user’s TSE MegaCore function top level module, RGMII interface ports are NOT connected directly to input/output pins. The user needs to make sure RGMII interface ports are connected directly to input/output pins to avoid above synthesis error.
Within the TSE MegaCore function, RGMII interface ports are connected directly to a ddrio input/output atom, which means it needs to be connected directly to an input/output pin with no other connections. Any other connection will give an error as shown above.
The error also will occur if you try to use SignalTap™ II tool to capture the RGMII interface signals. This is because SignalTap II tool will add logic to capture the RGMII interface signals and causes RGMII interface ports to be not directly connected to input/output pins.
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