Solution ID: rd11222009_660
Last Modified: May 06, 2010
Product Category: Intellectual Property
Product Area: Comm, Interface & Peripherals
Product Sub-area: Core Behavior / Operation
IP Product: POSPHY Level 4 (SPI 4.2)
Title
Are there any known issues with POS PHY Level 4 (SPI-4.2) Transmitter FIFO Threshold High(FTH) value in the User Guide?
Description
In the Altera® POS PHY Level 4 MegaCore™ function User Guide version 9.1, on page 3-15 under the paragraph "FIFO buffer threshold high (FTH)" description, please ignore the section of the User Guide shown below in italic text and instead use the text which follows shown in bold:
■ N= 4 or 8 bytes for 32-bit data path variations
■ N= 8 or 16 bytes for 64-bit data path variations
■ N= 16 bytes for 128-bit data path variations
1 The N byte values for the 32- and 64-bit variations depend on the Atlantic interface width. If the Atlantic interface width is greater than the data path width, the larger value for N is used.
■ N= 4 or 8 bytes for 32-bit data path variations
■ N= 8 or 16 bytes for 64-bit data path variations
■ N= 16 or 32 bytes for 128-bit data path variations
1 The N byte values depend on the Atlantic interface width and on the “Lite transmitter” setting.
The following table shows the N byte values, based on the transmitter’s settings:
Table 1 - Altantic FIFO FTH values
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