from Altera Corporation
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Overview
The ADI parallel port SDRAM controller reference design connects SDRAM to the parallel port of an Analog Devices Incorporated (ADI) ADSP-2126x Sharc digital signal processor and is implemented in Altera® FPGAs and CPLDs. Altera supplies the reference design as Verilog HDL source code. The reference design includes a testbench that allows you to test the Verilog HDL source code. The purpose of this reference design is to demonstrate that Altera devices provide a low cost SDRAM interface for ADI Sharc digital signal processors.
Features
- Runs on the ADDS-21261/Cyclone® FPGA evaluation kit (see below)
- Requires 250 to 300 logic elements, no RAM, and 49 pins
- SDRAM controller supports the 8-bit mode of the ADSP-2126x parallel port
- Digital signal processing (DSP) core clock CCLK has a maximum frequency of 200 MHz
- Memory controller supports operation at 66 Mbps
Demonstrated Altera Technology
Block Diagram
Figure 1. ADI Parallel Port SDRAM Controller Reference Design
Altera, Analog Devices, and Danville Signal Processing have created a hardware evaluation kit called the ADDS-21261/Cyclone that provides designers with the ability to evaluate a DSP+FPGA combination for a broad range of applications such as professional audio equipment, radar and navigation systems, software-based radios, industrial test and measurement equipment, medical instrumentation, video conferencing, voice recognition, and noise cancellation.
The ADDS-21261/Cyclone uses an Analog Devices ADSP-21261 SHARC Processor in combination with an EP1C3. Also included in the evaluation kit is Quartus® II Web Edition design software, an evaluation version of Analog Devices’ VisualDSP++, and design examples.
For more information, see http://www.analog.com/Analog_Root/static/promotions/cyclone/index.html. Also, see the ADI Parallel Port SDRAM Controller Application Notefor more details.
Reference Designs Disclaimer
These reference design illustrations may be used within Altera Corporation devices only and remain the copyrighted property of Altera. They are being provided on an "as-is" basis and as an accommodation, and therefore all warranties, representations, or guarantees of any kind (whether express, implied or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera.
