You can use the altout utility to generate an EDIF netlist file from a Composer schematic. This file can then be imported into the
To convert Composer schematics into MAX+PLUS II-compatible EDIF netlist files, follow these steps:
- Be sure to set up your working environment correctly, as described in Setting Up the MAX+PLUS II/Cadence Working Environment.
- Create a Composer schematic and save it in your working directory, as described in Creating Composer Schematics for Use with MAX+PLUS II Software.
You can instantiate MegaCore™ functions offered by Altera or by members of the Altera Megafunction Partners Program (AMPP™). The OpenCore™ feature in the MAX+PLUS II software allows you to instantiate, compile, and simulate MegaCore functions before deciding whether to purchase a license for full device programming and post-compilation simulation support.
Type the following command at the UNIX prompt from the working directory that contains the schematic:
altout -lib<design name>-rundir max2<design name>
- Process the <design name>.edf file with the MAX+PLUS II Compiler, as described in Compiling Projects with MAX+PLUS II Software.
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Altera does not warrant that this solution will work for the customer's intended purpose and disclaims all liability for use of or reliance on the solution.
