Using Cadence Concept & MAX+PLUS II Software

The following topics describe how to use the Cadence Concept software with MAX+PLUS^® II software. Click on one of the following topics for information:

Open a printable version of all topics listed on this page.

Setting Up the MAX+PLUS II/Cadence Working Environment

• Software Requirements
• Setting Up the MAX+PLUS II/Cadence Concept Work Environment for a Sun SPARCstation Running SunOS Software
• MAX+PLUS II Directory Structure
• MAX+PLUS II/Cadence Interface File Organization
• Concept & RapidSIM Local Work Area Directory Structure
• Concept & HDL Direct Project Directory Structure
• Altera-Provided Logic & Symbol Libraries

Design Entry

• Design Entry Flow
• Creating Concept Schematics for Use with MAX+PLUS II Software
  • Instantiating the clklock Megafunction in Concept Schematics
  • Instantiating LPM & Other Parameterized Functions in Concept Schematics
• Entering Resource Assignments
  • Assigning Pins, Logic Cells & Chips
  • Assigning Cliques
  • Assigning Logic Options
  • Modifying the Assignment & Configuration File with the setacf Utility
• Creating Hierarchical Projects in Concept Schematics
• Converting Concept Schematics into MAX+PLUS II-Compatible EDIF Netlist Files with the concept2alt Utility

Functional Simulation

• Performing a Functional Simulation of a Concept Schematic with the hdlconfig Utility & Verilog-XL Software
• Performing a Functional Simulation of a Concept Schematic with VerilogLink & Verilog-XL Software

Related Links:

• Compiling Projects with MAX+PLUS II Software
• Programming Altera Devices
• MAX+PLUS II Development Software
• Altera Programming Hardware
• Cadence web site (http://www.cadence.com)

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