Assigning Logic Options

Logic option and logic synthesis style assignments allow you to guide logic synthesis with logic optimization features that are specific to Altera^® devices. You can assign logic options and styles to individual logic functions in your design. The MAX+PLUS^® II Compiler also uses a device-family-specific default logic synthesis style for each project.

Related Topics:

• Go to "Resource Assignments in EDIF Input Files" and "Assigning Resources in a Third-Party Design Editor" in MAX+PLUS II Help for complete and up-to-date information on logic option and logic synthesis style assignments, including definitions and syntax of these assignments.

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