Using Mentor Graphics QuickHDL and QuickHDL Pro & MAX+PLUS II Software

The following topics describe how to use the Mentor Graphics QuickHDL and QuickHDL Pro software with MAX+PLUS^® II software. Choose one of the following topics for information:

Open a printable version of all topics listed on this page.

Setting Up the MAX+PLUS II/Mentor Graphics/Exemplar Logic Working Environment

• Software Requirements
• Altera-Provided Logic & Symbol Libraries
• Local Work Area Directory Structure
• Mentor Graphics Project Directory Structure
• MAX+PLUS II Project Directory Structure
• MAX+PLUS II/Mentor Graphics/Exemplar Logic Interface File Organization

Functional Simulation

• Design Entry Flow
• Performing a Functional Simulation with QuickHDL Software
• Performing a Functional Simulation with QuickHDL Pro Software

Timing Simulation

• Project Simulation/Timing Analysis Flow
• Initializing Registers in VHDL & Verilog Output Files for Power-Up before Simulation
• Performing a Timing Simulation with QuickHDL Software

Related Links:

• Go to the following MAX+PLUS II ACCESS^SM Key topics for related information:
  • Creating VHDL & Verilog HDL Designs for Use with MAX+PLUS II Software
  • Compiling Projects with MAX+PLUS II Software
  • Programming Altera Devices
• Go to the following topics, which are available on the web, for additional information:
  • MAX+PLUS II Development Software
  • Altera Programming Hardware
  • Mentor Graphics web site (http://www.mentor.com)

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