After you have compiled your project with the MAX+PLUS
To perform a timing analysis with QuickPath software, follow these steps:
- Be sure to set up the working environment correctly, as described in Setting Up the MAX+PLUS II/Mentor Graphics/Exemplar Logic Working Environment.
- Generate an EDIF Output File for your project using one of the following methods:
- Compiling Projects with MAX+PLUS II Software
- Using the Altera Schematic Express (sch_exprss) Utility
- Using the Altera VHDL Express (vhd_exprss) Utility
- Select your project's folder from the ALTERA directory, press Button 3, and choose Open max2_qpath to start the QuickPath software. You can also start the QuickPath software by typing
max2_qpath
at the UNIX prompt.
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Altera does not warrant that this solution will work for the customer's intended purpose and disclaims all liability for use of or reliance on the solution.
