Using Synopsys FPGA Express & MAX+PLUS II Software

The following topics describe how to use the FPGA Express and MAX+PLUS^® II software. Choose one of the following topics for more information:

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Software Requirements

Design Flow for FPGA Express Software

Design Entry

• Design Entry Flow

• VHDL

  • Creating VHDL Designs for Use with MAX+PLUS II Software
    • Instantiating the clklock Megafunction in VHDL or Verilog HDL
    • Instantiating LPM Functions in VHDL
    • Instantiating RAM & ROM Functions in VHDL
  
  

• Verilog HDL

  • Creating Verilog HDL Designs for Use with MAX+PLUS II Software
    • Instantiating the clklock Megafunction in VHDL or Verilog HDL
    • Instantiating LPM Functions in Verilog HDL
    • Instantiating RAM & ROM Functions in Verilog HDL

Synthesis & Optimization

• Synthesizing & Optimizing VHDL or Verilog HDL Files with FPGA Express Software
• Entering Resource, Device & Global Logic Synthesis Assignments
  • Assigning a Device & Clock Frequency (f_MAX)
  • Assigning Pins, Logic Options, and t_SU, t_CO and t_PD Timing Constraints
  • Specifying the MAX+PLUS II Logic Synthesis Style with FPGA Express Software
  • Using ACFs Generated by FPGA Express Software
  • Modifying the Assignment & Configuration File with the setacf Utility
• Analyzing Estimated Timing with the FPGA Express Time Tracker
• Specifying Speed/Area & CPU Effort Settings with the FPGA Express Software

Compilation

• Project Compilation Flow
• Compiling Projects with MAX+PLUS II Software

Related Links:

• Go to the following MAX+PLUS II ACCESS^SM Key topics for related information:
  • Programming Altera Devices
  • Using Synopsys Design Compiler or FPGA Compiler & MAX+PLUS II Software
  • Using Synopsys PrimeTime & MAX+PLUS II Software
  • Using Synopsys VSS & MAX+PLUS II Software
• Go to the following topics for additional information:
  • About the MAX+PLUS II Software
  • Altera Programming Hardware
  • Synopsys web site (http://www.synopsys.com)