Literature Licensing Buy On-Line Download Entire Site Part Number Knowledge DB

Home   |   Products   |   Support   |   End Markets   |   Technology Center   |   Education & Events   |   Corporate   |   Buy On-Line

Knowledge Database   |   Devices   |   Design Software   |   Intellectual Property   |   Reference Designs   |   Design Examples   |   mySupport

Products    Quartus II       SOPC Builder       MAX+PLUS II       ModelSim-Altera     Resource Centers       Overview       Installation & Licensing       Scripting       Board Design & I/O       Synthesis & Netlist Viewers       Incremental Compilation       Optimization       Power Management    TimeQuest Timing Analyzer       Classic Timing Analyzer       Simulation & Verification       On-Chip Debugging       HardCopy Design     Software Resources       OS Support       Driver Installation     Download & Licensing       Download    Licensing     Quartus II EDA Support       Quartus II Interface    Synthesis Tools    Simulation Tools    Formal Verification Tools    Timing Analysis Tools    Physical Synthesis Tools    Board Level Tools     Legacy Sw. EDA Support       View by Vendor       View by Tool       View by Function

Home > Support > Design Software > Quartus II Interface > Creating and Instantiating Altera-Provided Functions in Other EDA Tools Print This Page Subscribe to Email Creating and Instantiating Altera-Provided Functions in Other EDA Tools You can use Altera-provided megafunctions in other EDA tools by using the MegaWizard Plug-In Manager to create and instantiate custom megafunction variations that are based on Altera-provided megafunctions, including library of parameterized modules (LPM) functions, as well as Altera megafunctions The following examples show how to create a Verilog HDL or VHDL design using the specified EDA tools. Although one example is provided for each tool and each type of megafunction, you can use the same procedures and principles to create similar designs for other megafunctions or other EDA tools.   Note: If you are using the Synplify software, and you want to use the lpm_mult, lpm_ram_dp, lpm_ram_dq, lpm_rom, lpm_latch, or lpm_ff LPM functions, refer to Create a Design for Use with the Synplify Software.   For information on how to use the following functions, refer to the topics listed in the following table: Function Language EDA Tool Topic Title altclklock ClockLock phase-locked loop (PLL) Verilog HDL Synplify Creating and Instantiating a Verilog HDL Function for Use with the Synplify Software altclklock ClockLock phase-locked loop (PLL) VHDL Synplify Creating and Instantiating a VHDL Function for Use with the Synplify Software altcam CAM megafunction Verilog HDL LeonardoSpectrum Creating and Instantiating a Verilog HDL Function for Use with the LeonardoSpectrum Software     Rate This Page

Please Give Us Feedback

Home | Products | Support | End Markets | Technology Center | Education & Events | Corporate | Buy On-Line  Knowledge Database | Devices | Design Software | Intellectual Property | Reference Designs | Design Examples | mySupport  Contact Us | Site Help | Site Map | Privacy | Legal Notice  Copyright © 1995-2008 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA Altera, Stratix, Arria, Cyclone, MAX, HardCopy, Nios, Quartus and MegaCore are trademarks of Altera Corporation