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About Using the DC FPGA Software with the Quartus II Software

You can use the Synopsys Design Compiler FPGA design entry/synthesis tool to create, synthesize, and generate an EDIF Input File (.edf) for compilation in the Quartus II software. You can also launch the Quartus II software directly from the DC FPGA software. The following topics describe the typical flow with the DC FPGA software and the Quartus II software:

  1. Set up the DC FPGA working environment

  2. Create a design for use with the DC FPGA software

  3. Assign design constraints with the DC FPGA software

  4. Generate EDIF netlist files with the DC FPGA software

You can use Altera-provided megafunctions in other EDA tools by using the MegaWizard Plug-In Manager to create and instantiate custom megafunction variations that are based on Altera-provided megafunctions, including library of parameterized modules (LPM) functions, as well as Altera megafunctions. For more information on using the DC FPGA software to instantiate Altera-provided megafunctions, refer to Creating a Design for Use with the DC FPGA Software.

 

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More information is available on other EDA design entry/synthesis tools on the Altera website.

 

 

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