The ever increasing advancement in process technology makes power consumption a major concern with today’s FPGAs. To combat this concern, Altera provides PowerPlay power analysis and optimization tools. Power analysis tools accurately estimate the power of your design from the concept stages to implementation. Push-button power optimization technology further assists in reducing power for your design.
For general information on Altera® power optimization tools, see the following:
For resources on PowerPlay power analysis, see the following:
For resources on PowerPlay power optimization, see the following:
For resources on PowerPlay early power estimator and device power management, see the following:
To search for known power issues and technical support solutions, use Altera’s Knowledge Database. You can also visit the Altera Forum to share ideas and discuss technical issues with other Altera users.
For further technical support, use mySupport to create, view, and update service requests.
PowerPlay Power Analysis Resources
Table 1 provides information on available documentation on PowerPlay power analysis.
| Table 1. PowerPlay Power Analysis Documentation | |
| Title | Description |
|---|---|
| PowerPlay Power Analysis (PDF) | This chapter of the Quartus II Development Software Handbook describes Altera's PowerPlay power analysis tools, which provide improved power consumption accuracy and the ability to estimate power consumption from early design concept through implementation. |
Table 2 provides links to available training and demonstrations on PowerPlay power analysis.
| Table 2. PowerPlay Power Analysis Training and Demonstrations | |
| Title | Description |
|---|---|
| Analyzing and Optimizing Power in FPGAs (Online Course) |
This 10-minute demonstration provides an overview of PowerPlay power analysis tools and power optimization technology. |
| The Quartus II Software Design Series: Optimization (Instructor-Led Course) |
Learn advanced features of Quartus II design software that enable you to shorten your design cycle as well as improve your design performance and utilization. Use the incremental compilation flow and LogicLockTM regions in the Quartus II software to reduce compile times and preserve performance. Learn how to achieve required performance, resource usage, and power consumption by using design strategies, HDL coding styles, and Quartus II software settings. You will also learn how to manage compile times effectively and how to use Design Space Explorer (DSE) to select optimal settings for full or partial designs. This is an 8 hour instructor-led course. |
Power Optimization Resources
Table 3 provides links to available documentation on PowerPlay power optimization.
| Table 3. PowerPlay Power Optimization Documentation | |
| Title | Description |
|---|---|
| Power Optimization (PDF) | This chapter of the Quartus II Development Software Handbook describes in detail the power-driven compilation feature and flow. It also describes low power design techniques that can further reduce power consumption in your design. |
| AN 437: Power Optimization in Stratix III FPGAs (PDF) | This application note describes Stratix® III device-specific power optimization techniques. |
| AN 514: Power Optimization in Stratix IV FPGAs (PDF) | This application note describes Stratix IV FPGA power optimization techniques in detail and provides information about how to use them effectively. |
| Stratix III Programmable Power (PDF) | This white paper describes the innovative architecture of Stratix III FPGAs and the latest advancements in process technology and circuit techniques. |
Table 4 provides information on available training and demonstrations on power analysis and optimization.
| Table 4. PowerPlay Power Analysis and Optimization Training and Demonstrations | |
| Title | Description |
|---|---|
| Analyzing and Optimizing Power in FPGAs (Online Demonstration) |
This 10-minute demonstration provides an overview of PowerPlay power analysis tools and power optimization technology. |
