Table 1 shows an Avalon® Memory-Mapped (Avalon-MM) slave with global clock, reset, interrupt output, and export signals.
| Table 1. Avalon-MM Slave with Global Clock, Reset, Interrupt Output, and Export Signals | |||
| Signal Type | Direction | v7.1 and Earlier Interface | v7.2 and Later Interface |
|---|---|---|---|
| clk | Input | Global | Clock Input (1) |
| reset | Input | Global | Clock Input (1) |
| address | Input | Avalon Slave | Avalon Slave |
| read | Input | Avalon Slave | Avalon Slave |
| readdata | Output | Avalon Slave | Avalon Slave |
| write | Input | Avalon Slave | Avalon Slave |
| writedata | Input | Avalon Slave | Avalon Slave |
| waitrequest | Output | Avalon Slave | Avalon Slave |
| irq | Output | Avalon Slave | Interrupt Sender |
| my_export_signals | Input, Output, or Bidir | Global | Conduit |
Table 2 shows an Avalon-MM multi-port slave with global clock, reset, and export signals.
| Table 2. Avalon-MM Multi-Port Slave with Global Clock, Reset, and Export Signals | |||
| Signal Type | Direction | v7.1 and Earlier Interface | v7.2 and Later Interface |
|---|---|---|---|
|
clk |
Input | Global | Clock Input (1) |
| reset | Input | Global | Clock Input (1) |
| s1_address | Input | Avalon S1 Slave | Avalon S1 Slave |
|
s1_read |
Input | Avalon S1 Slave | Avalon S1 Slave |
| s1_readdata | Output | Avalon S1 Slave | Avalon S1 Slave |
| s1_write | Input | Avalon S1 Slave | Avalon S1 Slave |
| s1_writedata | Input | Avalon S1 Slave | Avalon S1 Slave |
| s1_waitrequest | Output | Avalon S1 Slave | Avalon S1 Slave |
| s1_export_signals | Input, Output, or Bidir | Avalon S1 Slave | S1 Conduit |
| s2_address | Input | Avalon S2 Slave | Avalon S2 Slave |
| s2_read | Input | Avalon S2 Slave | Avalon S2 Slave |
| s2_readdata | Output | Avalon S2 Slave | Avalon S2 Slave |
|
s2_write |
Input | Avalon S2 Slave | Avalon S2 Slave |
|
s2_writedata |
Input | Avalon S2 Slave | Avalon S2 Slave |
|
s2_waitrequest |
Output | Avalon S2 Slave | Avalon S2 Slave |
|
s2_export_signals |
Input, Output, or Bidir | Avalon S2 Slave | S2 Conduit |
Table 3 shows an Avalon-MM master with global clock, reset, interrupt input, and export signals.
| Table 3. Avalon-MM Master with Global Clock, Reset, Interrupt Input, and Export Signals | |||
| Signal Type | Direction | v7.1 and Earlier Interface | v7.2 and Later Interface |
|---|---|---|---|
|
clk |
Input | Global | Clock Input (1) |
|
reset |
Input | Global | Clock Input (1) |
|
address |
Output | Avalon Master | Avalon Master |
|
read |
Output | Avalon Master | Avalon Master |
|
readdata |
Input | Avalon Master | Avalon Master |
|
write |
Output | Avalon Master | Avalon Master |
|
writedata |
Output | Avalon Master | Avalon Master |
|
waitrequest |
Input | Avalon Master | Avalon Master |
|
irq |
Input | Avalon Master | Interrupt Receiver |
|
my_export_signals |
Input, Output, or Bidir | Global | Conduit |
Table 4 shows an Avalon-MM multi-port slave with interface-specific clocks and export signals.
| Table 4. Avalon-MM Multi-Port Slave with Interface-Specific Clocks and Export Signals | |||
| Signal Type | Direction | v7.1 and Earlier Interface | v7.2 and Later Interface |
|---|---|---|---|
|
s1_clk |
Input | Avalon S1 Slave | S1 Clock Input (1) |
|
s1_reset |
Input | Avalon S1 Slave | S1 Clock Input (1) |
|
s1_address |
Input | Avalon S1 Slave | Avalon S1 Slave |
|
s1_read |
Input | Avalon S1 Slave | Avalon S1 Slave |
|
s1_readdata |
Output | Avalon S1 Slave | Avalon S1 Slave |
|
s1_write |
Input | Avalon S1 Slave | Avalon S1 Slave |
|
s1_writedata |
Input | Avalon S1 Slave | Avalon S1 Slave |
|
s1_waitrequest |
Output | Avalon S1 Slave | Avalon S1 Slave |
|
s1_export_signals |
Input, Output, or Bidir | Avalon S1 Slave | S1 Conduit |
|
s2_clk |
Input | Avalon S2 Slave | S2 Clock Input (1) |
|
s2_reset |
Input | Avalon S2 Slave | S2 Clock Input (1) |
|
s2_address |
Input | Avalon S2 Slave | Avalon S2 Slave |
|
s2_read |
Input | Avalon S2 Slave | Avalon S2 Slave |
|
s2_readdata |
Output | Avalon S2 Slave | Avalon S2 Slave |
|
s2_write |
Input | Avalon S2 Slave | Avalon S2 Slave |
|
s2_writedata |
Input | Avalon S2 Slave | Avalon S2 Slave |
|
s2_waitrequest |
Output | Avalon S2 Slave | Avalon S2 Slave |
|
s2_export_signals |
Input, Output, or Bidir | Avalon S2 Slave | S2 Conduit |
Table 5 shows an Avalon-MM multi-port master and slave with interface-specific clocks.
| Table 5. Avalon-MM Multi-Port Master and Slave with Interface-Specific Clocks | |||
| Signal Type | Direction | v7.1 and Earlier Interface | v7.2 and Later Interface |
|---|---|---|---|
|
slave_clk |
Input | Avalon Slave | Slave Clock Input (1) |
|
save_reset |
Input | Avalon Slave | Slave Clock Input (1) |
|
slave_address |
Input | Avalon Slave | Avalon Slave |
|
slave_read |
Input | Avalon Slave | Avalon Slave |
|
slave_readdata |
Output | Avalon Slave | Avalon Slave |
|
slave_write |
Input | Avalon Slave | Avalon Slave |
|
slave_writedata |
Input | Avalon Slave | Avalon Slave |
|
slave_waitrequest |
Output | Avalon Slave | Avalon Slave |
|
master_clk |
Input | Avalon Master | Master Clock Input (1) |
|
master_reset |
Input | Avalon Master | Master Clock Input (1) |
|
master_address |
Output | Avalon Master | Avalon Master |
|
master_read |
Output | Avalon Master | Avalon Master |
|
master_readdata |
Input | Avalon Master | Avalon Master |
|
master_write |
Output | Avalon Master | Avalon Master |
|
master_writedata |
Output | Avalon Master | Avalon Master |
|
master_waitrequest |
Input | Avalon Master | Avalon Master |
- The clock input interfaces are associated each Avalon interface port in the Interfaces tab of the component editor.
