Literature Licensing Buy On-Line Download Entire Site Part Number Knowledge DB

Home   |   Products   |   Support   |   End Markets   |   Technology Center   |   Education & Events   |   Corporate   |   Buy On-Line

DSP   |   External Memory   |   Embedded Processing   |   High-Speed Serial I/O   |   Parallel I/O   |   Signal Integrity   |   System Integration

DSP Solutions       Overview       Devices       IP Cores       Reference Designs       Development Kits       Design Software    Video and Imaging       Communications       Benchmarks       Conference Papers       Training       Customer Successes       Literature

Home > Technology Center > DSP > Devices Print This Page Subscribe to Email Altera DSP-Related FPGA Features Overview Altera® FPGAs incorporate a variety of features such as embedded memory, embedded multipliers, embedded processors, high-speed I/O buffers, and external memory interfaces that are ideal for implementing digital signal processing (DSP) functions in FPGAs. The Altera DSP-related device features are listed below: Stratix® Series FPGAs Transceiver-Based FPGAs Cyclone® Series FPGAs Table 1. DSP-Related Features of the Stratix Series FPGAs Features Devices Stratix III Stratix II Stratix Maximum Memory Bits 17 Mbits 9 Mbits 7 Mbits Maximum Logic Elements (LEs) 338,000 179,400 79,040 Maximum Embedded Multipliers (9 x 9) 896 768 176 16 x 16 Multiplier Performance (1) 550 MHz (2) 450 MHz 275 MHz Maximum Available User I/O Pins 1,140 1,170 1,203 Nios® II Embedded Processor Support Yes Yes Yes Core Voltage  Selectable 0.9/1.1 V 1.2 V 1.5 V DSP Builder Support Yes Yes Yes SOPC Builder Support Yes Yes Yes DSP Intellectual Property (IP) Support Yes Yes Yes High-Speed I/O Interfaces LVDS, LVPECL, PCML (3), RapidIO™ LVDS, LVPECL, PCML, HyperTransport™, RapidIO LVDS, LVPECL, HSTL (4), PCML, HyperTransport, RapidIO Industrial Temperature Grade Device Support (-40° to 100°C) Yes Yes Yes Memory Interfaces SDR SDRAM, DDR (5) SDRAM, DDR2 SDRAM, DDR3 SDRAM, DDR FCRAM, QDR SRAM, ZBT SRAM, RLDRAM, RLDRAM II, QDR II SDR SDRAM, DDR SDRAM, DDR2 SDRAM, DDR FCRAM, QDR(6)  SRAM, ZBT(7)  SRAM, RLDRAM, RLDRAM II, QDR II SDR SDRAM, DDR SDRAM, DDR FCRAM, QDR SRAM, ZBT SRAM Top Table 2. DSP-Related Features of Altera’s Transceiver-Based FPGAs Features Devices Stratix II GX Stratix GX ArriaTM GX Maximum Memory Bits 6.7 Mbits 3 Mbits 4.2 Mbits Maximum Logic Elements (LEs) 132,540 41,250 90,232 Maximum Embedded Multipliers (9 x 9) 504 112 352 16 x 16 Multiplier Performance (1) 450 MHz 275 MHz 285 MHz Maximum Available User I/O Pins 798 548 538 Nios Embedded Processor Support Yes Yes Yes Core Voltage 1.2 V 1.5 V 1.2 V DSP Builder Support Yes Yes Yes SOPC Builder Support Yes Yes Yes DSP Intellectual Property (IP) Support Yes Yes Yes High-Speed I/O Interfaces LVDS, LVPECL, PCML, HyperTransport, RapidIO LVDS, LVPECL, HSTL, PCML, HyperTransport, RapidIO LVDS, LVPECL, PCML, HyperTransport, RapidIO Industrial Temperature Grade Device Support (-40° to 100°C) Yes Yes Yes Memory Interfaces SDR SDRAM, DDR SDRAM, DDR2 SDRAM, DDR FCRAM, QDR SRAM, ZBT SRAM, RLDRAM, RLDRAM II SDR SDRAM, DDR SDRAM, DDR FCRAM, QDR SRAM, ZBT SRAM SDR SDRAM, DDR SDRAM, DDR2 SDRAM, DDR2 FCRAM, QDR SRAM, ZBT SRAM Top Table 3. DSP-Related Features of the Cyclone Series FPGAs Features Devices Cyclone III Cyclone II Cyclone Maximum Memory Bits 3.98 Mbits 1.1 Mbits 288 Kbits Maximum LEs 119,088 68,416 20,060 Maximum Embedded Multipliers (9 x 9) 576 300 - 16 x 16 Multiplier Performance (1) 260 MHz 250 MHz 225 MHz Maximum Available User I/O Pins 534 622 301 Nios Embedded Processor Support Yes Yes Yes Core Voltage 1.2 V 1.2 V 1.5 V DSP Builder Support Yes Yes Yes SOPC Builder Support Yes Yes Yes DSP Intellectual Property (IP) Support Yes Yes Yes High-Speed I/O Interfaces LVDS, LVPECL, Mini-LVDS, HSTL, RSDS (8), SSTL LVDS, LVPECL, Mini-LVDS, HSTL, RSDS, SSTL LVDS Industrial Temperature Grade Device Support (-40° to 100°C) Yes Yes Yes Memory Interfaces SDR SDRAM, DDR SDRAM, DDR2 SDRAM, DDR FCRAM, QDR SRAM, ZBT SRAM, QDR II SRAM SDR SDRAM, DDR SDRAM, DDR2 SDRAM, DDR FCRAM, QDR SRAM, ZBT SRAM, QDR II SRAM SDR SDRAM, DDR SDRAM, DDR FCRAM, QDR SRAM, ZBT SRAM Notes: Based on two pipeline stages Based on 18 x 18 multipliers for Stratix III devices PCML = pseudo current mode logic HSTL = high-speed transceiver logic DDR = double data rate QDR = quad data rate ZBT = zero-bus turnaround RSDS = reduced swing differential signaling Top Stratix Series FPGAs Stratix III, Stratix II, and Stratix FPGA families feature DSP blocks and TriMatrix memory, which provide higher levels of performance for DSP systems. The Stratix III E variants provide a higher DSP-to-logic and memory-to-logic ratio than the Stratix III L variants, and are designed specifically for use in high-performance compute-intensive applications. Highlights High-density FPGAs with embedded DSP blocks that can provide nearly 500 giga multiply-accumulate operations per second (GMACS) of DSP throughput for high-performance DSP applications. DSP blocks consisting of multipliers, adders, subtractors, accumulators, and summation units Up to 17,208 Kbits of embedded memory  Up to 4,225 Kbits of MLAB memory High-speed serial I/O interfaces supporting up to 1-Gbps data transfer rates DSP Builder support for MATLAB and Simulink tools from The MathWorks SOPC Builder support for C-based design flow Stratix II GX and Stratix GX FPGAs Altera's Stratix II GX and  Stratix GX FPGAs feature DSP blocks and TriMatrix memory that provide higher levels of system integration for DSP systems. Highlights Up to 20 transceiver channels capable of 6.375-Gbps data transfer rates High-density FPGAs with embedded DSP blocks that can provide up to 227 GMACS of DSP throughput DSP blocks consisting of multipliers, adders, subtractors, accumulators, and summation units Up to 6.7 Mbits of embedded TriMatrix memory Soft multipliers based on the TriMatrix memory blocks High-speed I/O interface support providing up to 1.2-Gbps data transfer rates SOPC Builder design flow support Arria GX FPGAs Altera's Arria GX FPGAs feature DSP blocks and Trimatrix memory for applications that need DSP processing and high-speed serial interfaces. Highlights Up to 12 transceiver channels capable of 2.5-Gbps data transfer rates Embedded DSP blocks that can provide up to 100 GMACS of DSP throughput Up to 6.7 Mbits of embedded TriMatrix memory Soft multipliers based on the TriMatrix memory blocks Optimized for three high-speed serial protocols PCI Express x1 and x4 Gigabit Ethernet Serial RapidIO x1 and x4 at 1.25 and 2.5 Gbps SOPC Builder and DSP Builder design flow support Cyclone Series FPGAs Altera's Cyclone III, Cyclone II, and Cyclone FPGAs provide the lowest-cost FPGA solution for implementing price-sensitive DSP applications. Highlights Up to 288 embedded 18 x 18 multipliers, offering 260-MHz performance Soft multipliers based on M9K memory blocks Up to 119,088 LEs Up to 3.98 Mbits of embedded memory SOPC Builder design flow support Related Links Stratix III Stratix II Stratix Stratix II GX Stratix GX Arria GX Cyclone III Cyclone II Cyclone Rate This Page

Please Give Us Feedback

Home | Products | Support | End Markets | Technology Center | Education & Events | Corporate | Buy On-Line  DSP | External Memory | Embedded Processing | High-Speed Serial I/O | Parallel I/O | Signal Integrity | System Integration  Contact Us | Site Help | Site Map | Privacy | Legal Notice  Copyright © 1995-2008 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA Altera, Stratix, Arria, Cyclone, MAX, HardCopy, Nios, Quartus and MegaCore are trademarks of Altera Corporation