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FPGAs as Coprocessors for DSP Applications

The latest digital signal processing (DSP) applications demand system architecture solutions that address a range of requirements including performance, flexibility and scalability. Altera's Code:DSP solutions feature the devices, tools, intellectual property (IP) cores, and development platforms that enable developers to generate FPGA coprocessor designs to meet these needs (see Press Release: Altera Announces DSP Coprocessing Kit).

Instant Performance Boost With FPGA Coprocessors

System performance can be boosted by an order of magnitude compared to traditional DSP processor-only-based implementations using an FPGA coprocessor based on Stratix® II or CycloneTM II devices. FPGA coprocessors can offload a DSP processor and efficiently execute computationally intensive blocks of a DSP algorithm due to the inherent parallelism. This is especially attractive for emerging applications such as video and image processing and high-speed digital communications where DSP performance requirements are growing at the fastest rates.

Figures 1 and 2 show two examples of high-performance DSP applications that are efficiently implemented as part of an FPGA coprocessor. Figure 1 illustrates a WiMAX (802.16d/e) system where the forward error correction (FEC) baseband processing has been offloaded to an FPGA coprocessor. In Figure 2 for a high-definition H.264 video encoding system, the motion estimation, entropy coding, and deblocking filter have been implemented on a FPGA, while the rest of algorithm resides on the DSP processor.

Figure 1. Using an FPGA Coprocessor for WiMAX Baseband Processing

Figure 1. Using an FPGA Co-Processor for WiMAX Baseband Processing

Figure 2. Using an FPGA Coprocessor for High-Definition H.264 Encoding

Figure 2. Using an FPGA Co-Processor for High-Definition H.264 Encoding

Ready-to-Use FPGA Coprocessor IP

Altera makes FPGA coprocessor technology available today for all high-performance applications, and delivers standard coprocessors as pre-tested IP blocks that developers can customize for their specific applications. Altera’s DSP IP cores provide pre-designed, pre-optimized, flexible algorithm components that can be parameterized and integrated directly into system architectures.

Figure 3. Joint DSP Development Flow for DSPs and FPGAs

Figure 3. Joint DSP Development Flow for DSPs and FPGAs

Design Integration With FPGA Coprocessors

FPGA coprocessors can be developed quickly using standard development tools such as the Texas Instruments (TI) Code Composer Studio for TI DSPs, and DSP Builder, Altera’s data flow architecture development tool based on The MathWorks’ industry-leading MATLAB and Simulink tools (see Figure 3). Once the coprocessor architecture has been created, it can be exported to Altera’s SOPC Builder system development tool for further integration into the overall system architecture as illustrated in Figure 4. In addition, Altera and its partners provide a range of development platforms to verify FPGA coprocessor designs.

Figure 4. DSP System Integration Using FPGAs

 Figure 4. DSP System Integration Using FPGAs

Related Links

 
DSP Solutions Center

Analog Devices Link Port Reference Design

Texas Instruments EMIF Co-Processor Reference Design


The Altera Zone - Run Your System Faster With Stratix II

Three Steps to Higher Performance

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