Powerful Development Tools to Increase Productivity
With today’s short design cycles, anything that can increase productivity has the potential to pay big dividends, win market share, and establish a competitive advantage. Altera’s powerful development tools allow you to rapidly prototype, develop, and deploy embedded systems, reducing time-to-market while extending time-in-market.
With Altera's development tools and FPGA design flow, hardware and software development can occur in parallel, resulting in a significant time savings (see Figure 1).
Figure 1. Parallel Design Flow Reducing Time-To-Market
Hardware Productivity Tools
- System-level integration—Integrate your entire embedded system in a single FPGA. This helps to reduce your bill of material (BOM) costs, simplify your board design, and eliminate component headaches such as long lead times, processor or component qualification, and second-source availability.
- Feature-fill over time—Adapt quickly to new feature requests or changing market requirements and avoid schedule slips or board redesigns. Altera’s SOPC Builder system-level design software lets you easily add peripherals and communication channels or scale performance at any stage in the development cycle. Learn more about SOPC Builder.
- Rapid hardware iteration—Reduce hardware generation time with FPGA power tools such as the incremental compile capability of Altera’s Quartus® II design software. Learn more about incremental compile.
- Powerful on-chip debug—Capture and analyze signals from nodes buried deep in your FPGA and accelerate hardware debug using Altera’s SignalTap® II embedded logic analyzer. You can also use the Nios® II processor plug-in to the SignalTap II embedded logic analyzer to view real-time signal behavior during software debug. Learn more about the SignalTap II embedded logic analyzer.
- Fast path to high-volume ASIC—Reduce product cost as you move to high-volume production using Altera’s unique HardCopy® II structured ASIC solution. Once an Altera® FPGA design is finalized, you can migrate it to a structured ASIC in just weeks.
Software Productivity Tools
- Automatic BSP generation—Accelerate your software development with an automatically generated board support package (BSP) that includes a complete set of peripheral device drivers and system libraries. Learn about software drivers.
- Reference software templates—Build upon pre-built software designs such as real-time operating system, file system, and Ethernet designs that you can use as templates for your embedded application. Learn more about software project templates.
- Verification and validation—Simplify verification and validation through automated regression testing using the fully scriptable command-line design flow (PDF) of the Nios II Embedded Design Suite.
- Simplify software with multiple processors—Parallelize your design efforts by partitioning your large designs into simple, smaller applications that run on multiple processors. Build reusable code that is easy to create, debug, and maintain. See the article Subtract Software Costs by Adding CPUs by Jack G. Ganssle.
- Automated hardware acceleration—Accelerate time-critical functions by converting them to hardware. Simply right-click to accelerate ANSI C subroutines using the Nios II C-to-Hardware Acceleration (C2H) Compiler.
Accelerate Your Learning Curve
- Development tools—Get started immediately by downloading the complete set of Nios II processor design tools and intellectual property (IP) cores. Download now.
- Development kits—Accelerate your design efforts with one of our low-cost development kits.
- Reference designs—Reuse one of the many pre-built embedded reference designs as a template for your own application. Learn more about design examples.
- Training—Quickly come up to speed on how to use Altera tools through several in-depth tutorials, online training modules, or instructor-led training classes. Learn more about training.
Other Benefits
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