What's New in the Nios II Embedded Design Suite v9.1
Purchase or renew your Nios® II intellectual property (IP) core license to get updates to embedded tools included in the Nios II Embedded Design Suite (EDS), as well as performance enhancements for the Nios II processor. Contact your local Altera® sales representative or distributor to place your order.
Nios II Embedded Design Suite and Quartus® II design software version 9.1
Nios II Embedded Design Suite
Nios II Software Build Tools—a set of powerful commands, utilities, and scripts to manage build options for applications, board support packages, and software libraries.
Nios II Software Build Tools For Eclipse—a fully integrated development environment built from the ground up using Nios II Software Build Tools as a foundation built entirely as plug-ins to industry-standard Eclipse.
Nios II Software Build Tools for Eclipse focuses on improving software productivity for large software applications and team-based software design.
Key features:
- Faster software compile times as compared to Nios II IDE
- Fine control over build options for board support packages
- Improved revision control and project hand off
- Feature-rich Nios II Flash Programmer GUI for building composite flash images
The new Nios II Software Build Tools for Eclipse is part of the Nios II Embedded Design Suite and is the next generation of the Nios II IDE. The Nios II IDE will continue to ship as a legacy tool. You can find instructions on converting your Nios II IDE project to the new Nios II Software Build Tools for Eclipse in the Appendix A. Using the Nios II Integrated Development Environment (PDF).
Download the Nios II Software Build Tools for Eclipse Handbook (PDF).
Nios II Processor
Nios II real-time performance—new Nios II Vector Interrupt Controller (VIC) reduces interrupt latency for fast, deterministic real-time applications.
- Key Nios II VIC features:
- Interrupt service response latency—5 times faster response (less than 20 clock cycles)
- Non-maskable interrupt (NMI)—guaranteed response to high-priority interrupts
- Daisy-chain interrupt sources—32 interrupts per VIC
- Nios II VIC Literature:
Nios II/e core now FREE—designed to use the fewest FPGA logic and memory resources of the Nios II processor family, the Nios II/e core is now free. Licensing is still required for higher performance Nios II/s and Nios II/f cores.
Embedded Linux Support for the Nios II Processor—Nios II developers now have a wide range of embedded Linux providers from which to choose. From free open-source distributions to commercial support from industry leaders, Altera’s embedded Linux partners offer the right level of support. Learn more about your Linux options.
New Nios II Design Examples—the following design examples ship with Quartus II software version 9.1:
- Nios II 3C120 Hardware Reference Design with MMU, Cyclone III Edition
- Nios II 3C120 Hardware Reference Design with Triple Speed Ethernet, Cyclone III Edition
- Nios II 4S230 Hardware Reference Design with MMU, Stratix IV GX Edition
- Nios II 4S230 Hardware Reference Design with Triple-Speed Ethernet, Stratix IV GX Edition
BeMicro FPGA-based MCU Evaluation Board—If you are new to designing with FPGAs, or new to implementing microcontrollers in FPGAs, then the BeMicro FPGA-based MCU Evaluation Kit is for you. This low-cost evaluation kit includes a complete lab to get you started designing a custom microprocessor system in an FPGA in just minutes.
Embedded IP Suite—a value bundle of Altera's most popular embedded IP cores and software available for $495 with purchase of an Altera development kit.
See what's new with Quartus II design software version 9.1
Nios II Embedded Design Suite and Quartus II design software version 9.1
What's New in the Nios II Embedded Design Suite v9.0
Release 9.0 adds support for devices and updates to embedded tools including the Nios II Embedded Design Suite (EDS), embedded peripherals, SOPC Builder, and development kits.
Development Kits
- Support for the new Altera Embedded Systems Development Kit, Cyclone III Edition: A complete development platform for prototyping embedded systems on Altera’s low-cost, low-power FPGAs
- Cyclone III FPGA base board with two high-speed mezzanine connectors (HSMC) to interface to a wide range of daughtercards
- LCD multimedia HSMC to interface to common peripherals such as standard definition (SD) cards, color LCD touch panels, audio, video, etc.
- Multi-purpose HSMC card with support for USB 2.0 and Mictor debug connector and Santa Cruz header
- Pre-built processor systems
- Ready-to-run demos for quickly evaluating processor systems, IP, and operating systems
- Example software applications with source code to accelerate software development
Embedded Peripherals
- Enhanced general-purpose I/O (GPIO) core that simplifies software development
Enhanced SOPC Builder
- Data sheet generation to document SOPC Builder systems
- Collapsible GUI for better visualization of large systems
