Altera is a pioneer and leader in integrating transceivers into FPGAs. In 2001, we introduced our first FPGA family with integrated transceivers. Since then, we've introduced many innovations to make transceivers run faster, operate more reliably, and support emerging protocols with each generation of FPGAs and ASICs. With Stratix® V GT FPGAs, we support the fastest monolithic FPGA transceivers with data rates up to 28.05 Gbps, as well as, the fastest backplane capable transceivers in our Stratix V GX FPGAs with data rates up to 14.1 Gbps. In addition, Altera's next-generation 20 nm product families include a number of groundbreaking features, including monolithic 28 Gbps backplane-capable transceivers, and 40 Gbps chip-to-chip transceivers.
Read about how our transceiver expertise is helping us develop direct optical interfaces in our programmable devices. Our optical innovation will overcome future bandwidth limitations of copper-based interconnects.
At 28 nm, we extend our transceiver technology leadership with:
- Technology for 14.1 Gbps and 28.05 Gbps transceivers
- Technology for low-cost, low-power 10.3125 Gbps, 6.5536 Gbps, 6.144 Gbps, and 3.125 Gbps transceivers
- Support for driving optical modules directly with built-in:
- Electronic dispersion compensation (EDC)
- LC (inductor-capacitor) based phase-locked loops (PLLs) for ultra low jitter
- Support to direct interface to 10GBASE-KR backplanes using:
- 4-tap transmit pre-emphasis
- 5-tap decision feedback equalizer (DFE)
- 4-stage continuous time linear equalizer (CTLE)
- Plug & Play Signal Integrity technology with adaptive dispersion compensation engine (ADCE)
- Full-featured physical coding sublayer (PCS) IP:
- 8b/10b encoder/decoder
- 64/66 encoder/decoder
- Gearbox
- Channel bonding
- Support for PCI Express® (PCIe®) Gen1/2/3 and FPGA configuration through PCIe
- Support for 40G and 100G Ethernet
- On-chip instrumentation with EyeQ horizontal and vertical data eye monitor
- Dynamic and fine-grained partial reconfiguration
- Extensive intellectual property (IP) library of industry-standard transceiver protocols
Altera provides a broad portfolio of FPGAs and ASICs with integrated transceivers to address bandwidth needs from consumer to wireline applications. Within this portfolio, you'll discover a diverse mix of FPGAs and ASICs with as many as 66 14.1 Gbps transceiver channels with backplane capability in Stratix V GX FPGAs for high density applications to as few as two 3.125 Gbps transceiver channels in Cyclone® IV GX FPGAs for cost sensitive applications designed to fit your system needs. See Table 1 for more details about our wide range of FPGAs and ASICs with integrated transceivers.
Table 1: FPGAs and ASICs with integrated transceivers
| Device | Maximum Number of Channels |
Maximum Data Rate (Gbps) |
Backplane Support | Optical Module Support |
|---|---|---|---|---|
| Stratix V GT (28 nm) | 36 | 28.05 | Yes | Yes |
| Stratix V GX (28 nm) | 66 | 14.1 | Yes | Yes |
| Stratix IV GT (40 nm) | 48 | 11.3 | Yes | Yes |
| Stratix IV GX (40 nm) | 48 | 8.5 | Yes | Yes |
| HardCopy® IV GX (40 nm) | 36 | 6.5 | Yes | Yes |
| Arria® V GT (28 nm) | 20 | 10.3125 | Yes | - |
| Arria V GX (28 nm) | 36 | 6.5536 | Yes | - |
| Arria II GZ (40 nm) | 24 | 6.375 | Yes | Yes |
| Arria II GX (40 nm) | 16 | 6.375 | Up to 3.75 Gbps | - |
| Cyclone V GT (28 nm) | 12 | 6.144 | - | - |
| Cyclone V GX (28 nm) | 12 | 3.125 | - | - |
| Cyclone IV GX (60 nm) | 8 | 3.125 | - | - |
The portfolio also offers the productivity advantage of the comprehensive Quartus® II design software, a common set of IP cores, sophisticated signal integrity tools, and a variety of supporting reference designs and design examples.
With Quartus II design software, you’ll experience:
- Faster design and compile times
- More efficient system resource utilization resulting in higher system integration
- Higher integration with higher density products
- Optimized core performance, so you can efficiently close timing on designs and lower your engineering costs
- The ability to seamlessly connect IP blocks with a simple, intuitive GUI
- In addition, as part of the Quartus II design environment, Altera's Transceiver Toolkit gives you the ability to validate transceiver link signal integrity real-time in a system and reduce board bring-up time.
