- Overview of DisplayPort Solution
- DisplayPort IP MegaCore® function
- Technology Background
- Related Links
Altera and partner Bitec provide the building blocks and complete reference designs to implement a FPGA-based DisplayPort solution for consumer equipment requiring next-generation video connectivity. This includes DTVs, LCD projectors, and computer monitors. The solution, which includes the DisplayPort intellectual property (IP) core and FPGA development hardware, allows you to focus on the core functions of the system design by providing the following benefits:
- Simple and fast protocol implementation
- Reduced design risks
- Shortened development times
Selected Altera® FPGA families include embedded transceiver I/Os to support the physical layers of the DisplayPort protocol. The logical functions are supported in IP, allowing the protocol and user design to be implemented in a single low-cost device. Additional video processing algorithms can be added using the remaining FPGA logic, embedded memory, and embedded DSP resources. Table 1 gives an overview of the complete DisplayPort solution for Altera devices.
|Table 1. Complete DisplayPort Solution|
|Physical Interface||Integrated transceiver I/Os within the FPGA provide physical layer protocol support for 1, 2, or 4 lanes at 1.62, 2.7, or 5.4 Gbps link rates.|
|Altera MegaCore||Altera DisplayPort IP MegaCore function (supporting specification revision 1.2)|
|Partner DisplayPort IP Core||Bitec's DisplayPort IP core (supporting specification revision 1.2)|
Altera DisplayPort IP MegaCore function provides seamless integration to your video system and takes advantage of Altera's high-performance and low-cost FPGAs with integrated transceiver I/Os to get to market faster than ASIC-based solutions. The IP core technical features and integration with Altera's Quartus® II design software allow additional functionality.
- DisplayPort IP Megacore (ordering code: IP-DP)
- Video IP Bundle special - 50% discount (Expires on September 31, 2013)
- Video and Image Processing Suite + DisplayPort (ordering code: IP-VIP-DP)
- Video and Image Processing Suite + DisplayPort + serial digital interface (SDI) (ordering code: IP-VIP-SDI-DP)
The IP core includes Qsys-compatible interfaces and design example shows integrate to other Altera video MegaCore functions.
- Video and Image Processing IP Suite (ordering code: IPS-VIDEO)
- Nios® II 32-bit embedded processor IP (ordering code: IP-NIOS )
DisplayPort is a license- and royalty-free standard designed to provide next-generation high-bandwidth capability between video sources and destinations (Figure 1). DisplayPort 1.1a and 1.2 provide ample bandwidth and features to support current and future (3D, 4K2K, multiple displays, etc.) display requirements. Some features include:
- Small USB-sized connectors and cabling
- Longer cable lengths
- Higher performance (faster refresh rates, > 12 bits color, quad HD pixel resolution)
- LCD direct connection
- Optional audio and HDCP support
- Interoperability with existing DVI and HDMI systems
Figure 1. Simplified DisplayPort Topology
Mainstream PC and GPU chipsets already have DisplayPort functionality integrated, resulting in a wide variety of video sources (i.e. graphics card, netbook, desktop, etc.) which can connect via DisplayPort connectors and cables to DisplayPort-enabled video destinations (i.e. monitors, displays, or projectors).