Fibre Channel is a high-speed robust protocol for managing the transfer of information in storage area networks (SANs). It supports data rates from 1 through 10 Gbps. At 10 Gbps, it leverages much of the technology used by Ethernet, making use of XGMII and XAUI interfaces, for example. Fibre Channel can help with design of large-scale, storage-intensive systems. It can also provide a solution that allows rapid storage and retrieval of information, while simplifying the interconnection of different components in the system. Figure 1 shows the Fibre Channel topography.
Figure 1. Fibre Channel Topology
Altera® devices can implement 1-, 2-, 4-, 8-, and 10-Gbps versions of Fibre Channel. The cores are highly configurable, allowing you to customize the operation of the core without engaging in a separate engineering customization project. The Altera solutions cover the FC-1 and FC-2 layers of the Fibre Channel stack.
The high-speed Arria® II, Stratix® V (GX and GT), Stratix IV (GX and GT), Stratix II GX, and Stratix GX FPGAs and HardCopy® IV GX ASICs provide the kind of performance that allows implementation of 1- and 2-Gbps Fibre Channel in lower-speed-grade devices, while still supporting leading-edge development of 4-Gbps, 8-Gbps, and 10-Gigabit implementations. These devices are equipped with built-in transceivers that provide a dedicated mode for implementing the XAUI interface that is available for 10-Gigabit Fibre Channel. This allows for more efficient implementation of the entire interface in a single device. Embedded within this transceiver are dedicated rate-matching FIFO buffers, 8B/10B encoding and decoding functions, and word-alignment functions. Each group of four channels also has built-in channel alignment circuitry to minimize skew across the interface. The Stratix V GT and Stratix IV GT devices, with integrated transceivers supporting a 10-Gbps data rate, allow for implementation of the Fibre Channel over Ethernet (FCoE) protocol. Stratix V GT devices with an integrated 64B/66B encoder/decoder provide a more efficient implementation of this protocol.
- Arria II FPGAs
- Stratix V FPGAs
- Stratix IV FPGAs
- HardCopy IV ASICs
- Stratix II GX Device Family
- Stratix GX FPGAs
- Stratix GX Multi-Gigabit Transceiver Block Technical Details
- Stratix GX Transceiver User Guide (PDF)
- Selecting the Correct High-Speed Transceiver Solution white paper (PDF)
- Stratix GX Device Literature
- Stratix GX Transceiver Protocols
- The Fibre Channel Characterization Report for Stratix II GX devices is available upon request; contact your local Altera sales office.