Altera provides a wide range of FPGA solutions to satisfy demands of high-speed serial I/O applications. Stratix® GX FPGAs contain up to twenty 500-Mbps to 3.1875-Gbps transceiver channels and Stratix II GX devices also contain transceivers with excellent performance across a 622-Mbps to 6.375-Gbps operating range. Both Stratix II GX and Stratix GX FPGAs offer the benefit of reducing board complexity with fully integrated solutions.
Cyclone® II FPGAs combined with an external transceiver (or PHY device) allow users to take advantage of the industry’s lowest-cost FPGAs. Stratix II FPGAs combined with an external transceiver provide a seamless migration path to Altera’s HardCopy® II ASICs, which extend the flexibility of FPGAs to high-volume, price-sensitive applications.
Multi-Protocol Serial Development System Overview
PMC-Sierra and Altera have collaborated in the design of low-cost, multi-protocol serial development system, which supports widely deployed interface protocol standards such as PCI Express, PCI Express Advanced Switching, Serial RapidIO®, Gigabit Ethernet, XAUI, Fibre Channel (1G, 2G, and 10G), Open Base Station Architecture Initiative (OBSAI), and Common Protocol Radio Interface (CPRI).
The multi-protocol serial development system is a flexible, cost-effective board using an Altera® Stratix II EP2S90 FPGA and two PMC-Sierra QuadPHY 10GX PM8358 devices. This system is ideal for developing a wide range of chip-to-chip, backplane, end-point, and line-interface solutions. This development system includes design guidelines, board layout considerations, and typical reference applications.
Figure 1 is a photo of this multi-protocol serial development system. Figure 2 illustrates the block diagram of an application example implemented with this system.
Figure 1. Altera/PMC-Sierra Multi-Protocol Serial Development System
Figure 2. Application Example Block Diagram
Table 1 summarizes capability and protocol support of this multi-protocol serial development system.
| Table 1. Protocol Support for Altera/PMC-Sierra Multi-Protocol Serial Development System | ||||||
| Feature | Data Rate | Supported Standards | Signal Type | Availability | Optimized For | |
|---|---|---|---|---|---|---|
| Min | Max | |||||
| PM8358 | 1.25 Gbps | 3.2 Gbps | PCI-E/AS/CPRI/OBSAI/ GbE/XAUI/SRIO/FC |
NRZ | Now | Chip-to-chip/ Backplane/ Line-interface |
| Notes: | |
| PCI-E = PCI Express (2.5 Gbps) | GbE = 1000-BaseX Gigabit Ethernet |
| AS = Advanced Switching | XAUI = 10 Gigabit Attachment Unit Interface |
| CPRI = Common Protocol Radio Interface | SRIO = Serial RapidIO |
| OBSAI = Open Base Station Architecture Initiative | FC = Fibre Channel (1 and 2 Gbps) |
To find out more information about the Altera/PMC-Sierra Multi-Protocol Serial Development System, contact your local Altera or PMC-Sierra sales representative.
Related Links
Development Boards
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PMC-Sierra Multi-Protocol Serial Development System short form data sheet, board specification, and board schematics
PMC-Sierra External Transceivers
- PMC-Sierra PM8358 QuadPHY 10GX
- QuadPHY 10GX characterization reports available upon request; contact your local PMC-Sierra Sales Office
