Altera Home Page
Literature Licensing
Buy On-Line Download

  Home   |   Products   |   Support   |   End Markets   |   Technology Center   |   Education & Events   |   Corporate   |   Buy On-Line  
  DSP   |   External Memory   |   Embedded Processing   |   High-Speed Serial I/O   |   Parallel I/O   |   Signal Integrity   |   System Integration  

 DRAM
      Overview
      DDR SDRAM
      DDR2 SDRAM
      DDR3 SDRAM
      RLDRAM II
      SDR SDRAM
  
 SRAM
      Overview
      QDR I / QDR II
      ZBT/Nobl
  
 By FPGA
      Cyclone III
      Cyclone II
      Stratix III
      Stratix II/Stratix II GX
  

Memory Solutions Center: QDRII SRAM

QDRII SRAM devices enable you to maximize memory bandwidth with separate read and write ports. The QDRII architecture features two data ports operating twice per clock cycle to deliver a total of four data instructions per cycle. The resulting performance increase is particularly valuable in bandwidth-intensive applications such as main memory for look-up tables (LUTs), linked lists, and controller buffer memory.

QDRII and QDRII+ devices offer significant benefits over QDR devices, including higher performance, increased data valid time, simplified data capture, a guaranteed relationship between clock rate and data rate, and an overall ease-of-design. The QDR SRAM website contains more information on the benefits of QDRII devices.

Table 1 lists QDRII/QDRII+ SRAM memory interface performance support in Altera® FPGAs.

Table 1. QDRII/QDRII+ SRAM Memory Interface Performance Support in Altera FPGAs
Device Maximum QDRII/QDRII+ SRAM Interface Performance
Stratix® III 1.4 Gbps (1) (350 MHz)
Stratix II 1 Gbps (1) (250 MHz)
Stratix II GX 1 Gbps (1) (250 MHz)
HardCopy® II

1 Gbps (1) (250 MHz)

Stratix 800 Mbps (200 MHz)
Stratix GX 800 Mbps (200 MHz)
Cyclone® III 667 Mbps (167 MHz)
Cyclone II 667 Mbps (167 MHz)

Note:

  1.  For both read and write ports

Technical Documentation

Altera offers the following technical documentation that contains information on device support for the QDR and QDRII memory interfaces, as shown in Table 2.

Table 2. QDRII SRAM Technical Documentation
Device Handbooks Applicable Devices
Stratix III Device Handbook:
External Memory Interfaces in Stratix III Devices (PDF) chapter
Stratix III
Stratix II Device Handbook:
External Memory Device Interfaces (PDF) chapter
Using Selectable I/O Standards (PDF) chapter
Stratix II
Stratix/Stratix GX Device Handbook:
External Memory Device Interfaces (PDF) chapter
Using Selectable I/O Standards (PDF) chapter
Stratix / Stratix GX
Cyclone III Device Handbook:
External Memory Interfaces in Cyclone III Devices (PDF) chapter
Cyclone III
Cyclone II Device Handbook:
External Memory Device Interfaces (PDF) chapter
Using Selectable I/O Standards (PDF) chapter
Cyclone II
White Papers Applicable Devices
Selecting the Right High-Speed Memory Technology for Your System (PDF) All
User Guides Applicable Devices
QDRII SRAM Controller MegaCore Function User Guide (PDF) 

HardCopy II
Stratix/Stratix GX
Stratix II/Stratix II GX

Application Notes Applicable Devices
AN 326: Interfacing QDRII SRAM With Stratix II Devices (PDF) Stratix II
AN 349: QDR SRAM Controller Reference Design for Stratix & Stratix GX Devices (PDF) Stratix
Stratix GX
Hardware Test Results Applicable Devices
Hardware Test Results Stratix

Software Support and Tools

Altera offers the tools shown in Table 3 to aid in the QDRII and QDRII+ SRAM memory interface design process.

Table 3. QDRII SRAM Software and Support Tools
Feature Applicable Devices
TimeQuest Timing Analyzer All
IBIS Models for I/O Buffers

Stratix, Stratix GX, Stratix II, Stratix II GX

IP Cores and Reference Designs

Table 4 lists QDRII SRAM controller intellectual property (IP) cores and reference designs available from Altera.

Table 4. QDRII SRAM  IP Cores and Reference Designs
Controller Name Free Evaluation Vendor Devices Supported
QDRII SRAM Controller MegaCore® Function  Yes Altera Stratix III, Stratix II, Stratix II GX,
Stratix, Stratix GX

Development Kits and Hardware Reference Platforms

Table 5 lists memory hardware reference platforms available from Altera. The Gerber files, layout, termination recommendations, and signal integrity analysis information of these reference platforms are also available.

Table 5. QDRII SRAM Development Kits and Hardware Reference Platforms
Board Name Vendor Contact Information
QDRII SRAM Stratix Memory Reference Platform Altera Contact Altera or your local Altera FAE

QDRII SRAM Vendors

Related Links

 
Signal Integrity Center

Memory Solution Center

Memory Interface Design On-Line Demonstration


Open Your Eyes - Visit the Signal Integrity Center

  Please Give Us Feedback