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Memory Solutions Center: QDR II SRAM

Home > Technology > External Memory > QDR I / QDR II

Related Links

  • Signal Integrity Center
  • Memory Solution Center
  • Memory Interface Design On-Line Demonstration

QDR II SRAM devices enable you to maximize memory bandwidth with separate read and write ports. The QDR II architecture features two data ports operating twice per clock cycle to deliver a total of four data instructions per cycle. The resulting performance increase is particularly valuable in bandwidth-intensive applications such as main memory for look-up tables (LUTs), linked lists, and controller buffer memory.

QDR II and QDR II+ devices offer significant benefits over QDR devices, including higher performance, increased data valid time, simplified data capture, a guaranteed relationship between clock rate and data rate, and an overall ease-of-design. QDR II SRAM vendor websites contain more information on the benefits of QDR II devices.

Table 1 lists QDR II/QDR II+ SRAM memory interface performance support in Altera® FPGAs and HardCopy® ASICs.

Table 1. QDR II/QDR II+ SRAM Memory Interface Performance Support in Altera Devices
Device Maximum QDR II/QDR II+ SRAM Interface Performance
Stratix® IV 1.6 Gbps (1) (400 MHz)
Stratix III 1.6 Gbps (1) (400 MHz)
Stratix II 1 Gbps (1) (250 MHz)
Stratix II GX 1 Gbps (1) (250 MHz)
Stratix

800 Mbps (200 MHz)

Stratix GX

800 Mbps (200 MHz)

Arria® II GX

1 Gbps (1, 2) (250 MHz)

Cyclone® IV

667 Mbps (167 MHz)

Cyclone III

667 Mbps (167 MHz)

Cyclone III LS

300 Mbps (150 MHz)

Cyclone II

667 Mbps (167 MHz)

HardCopy IV 1.4 Gbps (1, 2) (350 MHz)
HardCopy III 1.4 Gbps (1, 2) (350 MHz)
HardCopy II 1 Gbps (1) (250 MHz)

Notes:

  1. For both read and write ports
  2. Subject to characterization

Technical Documentation

Altera offers the following technical documentation that contains information on device support for the QDR and QDR II memory interfaces, as shown in Table 2.

Table 2. QDR II SRAM Technical Documentation
Device Handbooks Applicable Devices
Stratix IV Device Handbook:
External Memory Interfaces in Stratix IV Devices (PDF) chapter
Stratix IV
HardCopy IV
Stratix III Device Handbook:
External Memory Interfaces in Stratix III Devices (PDF) chapter
Stratix III
HardCopy III
Stratix II Device Handbook:
External Memory Device Interfaces (PDF) chapter and
Using Selectable I/O Standards (PDF) chapter
 
Stratix II
HardCopy II
Stratix/Stratix GX Device Handbook:
External Memory Device Interfaces (PDF) chapter and
Using Selectable I/O Standards (PDF) chapter
 
Stratix/Stratix GX
Arria II GX Device Handbook: 
External Memory Interfaces in Arria II GX Devices (PDF) chapter 

Arria II GX

Cyclone IV Device Handbook:
External Memory Interfaces in Cyclone IV Devices (PDF) chapter 

Cyclone IV

Cyclone III Device Handbook:
External Memory Interfaces in Cyclone III Devices (PDF) chapter 
Cyclone III
Cyclone II Device Handbook:
External Memory Device Interfaces (PDF) chapter and
Using Selectable I/O Standards (PDF) chapter
 
Cyclone II
White Papers Applicable Devices
Selecting the Right High-Speed Memory Technology for Your System (PDF) All
User Guides Applicable Devices
QDR II SRAM Controller MegaCore Function User Guide (PDF)

Stratix II/Stratix II GX
Stratix/Stratix GX
HardCopy II

Application Notes Applicable Devices
AN 326: Interfacing QDR II SRAM With Stratix II Devices (PDF) Stratix II
AN 349: QDR SRAM Controller Reference Design for Stratix & Stratix GX Devices (PDF) Stratix
Stratix GX
Hardware Test Results Applicable Devices
Hardware Test Results Stratix

Software Support and Tools

Altera offers the tools shown in Table 3 to aid in the QDR II and QDR II+ SRAM memory interface design process.

Table 3. QDR II SRAM Software and Support Tools
Feature Applicable Devices
TimeQuest Timing Analyzer All
IBIS Models for I/O Buffers All

IP Cores and Reference Designs

Table 4 lists QDR II SRAM controller intellectual property (IP) cores and reference designs available from Altera.

Table 4. QDR II SRAM IP Cores and Reference Designs
Controller Name Free Evaluation Vendor Devices Supported
QDR II SRAM Controller MegaCore® Function Yes Altera Stratix III, Stratix II, Stratix II GX,
Stratix, Stratix GX,
HardCopy III, HardCopy II

Development Kits and Hardware Reference Platforms

Table 5 lists memory hardware reference platforms available from Altera. The Gerber files, layout, termination recommendations, and signal integrity analysis information of these reference platforms are also available.

Table 5. QDR II SRAM Development Kits and Hardware Reference Platforms
Board Name Vendor Contact Information
QDR II SRAM Stratix Memory Reference Platform Altera Contact Altera or your local Altera FAE

QDR II SRAM Vendors

  • Samsung
  • Cypress
  • NEC

Related Links

  • Stratix IV Device I/O Connectivity
  • Stratix III Device I/O Connectivity
  • External Memory Device Interfaces in Stratix II, Stratix, and Stratix GX FPGAs
  • External Memory Device Interfaces in Cyclone II and Cyclone FPGAs
  • External Memory Interfaces in Cyclone IV Devices (PDF) 
  • External Memory Device Interfaces in APEX™ II Devices
  • Altera's Signal Integrity Center
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