Memory Solutions Center: QDRII SRAM
QDRII SRAM devices enable you to maximize memory bandwidth with separate read and write ports. The QDRII architecture features two data ports operating twice per clock cycle to deliver a total of four data instructions per cycle. The resulting performance increase is particularly valuable in bandwidth-intensive applications such as main memory for look-up tables (LUTs), linked lists, and controller buffer memory.
QDRII and QDRII+ devices offer significant benefits over QDR devices, including higher performance, increased data valid time, simplified data capture, a guaranteed relationship between clock rate and data rate, and an overall ease-of-design. The QDR SRAM website contains more information on the benefits of QDRII devices.
Table 1 lists QDRII/QDRII+ SRAM memory interface performance support in Altera® FPGAs.
| Table 1. QDRII/QDRII+ SRAM Memory Interface Performance Support in Altera FPGAs |
| Device |
Maximum QDRII/QDRII+ SRAM Interface Performance |
| Stratix® III |
1.4 Gbps (1) (350 MHz) |
| Stratix II |
1 Gbps (1) (250 MHz) |
| Stratix II GX |
1 Gbps (1) (250 MHz) |
| HardCopy® II |
1 Gbps (1) (250 MHz)
|
| Stratix |
800 Mbps (200 MHz) |
| Stratix GX |
800 Mbps (200 MHz) |
| Cyclone® III |
667 Mbps (167 MHz) |
| Cyclone II |
667 Mbps (167 MHz) |
Note:
- For both read and write ports
Technical Documentation
Altera offers the following technical documentation that contains information on device support for the QDR and QDRII memory interfaces, as shown in Table 2.
Software Support and Tools
Altera offers the tools shown in Table 3 to aid in the QDRII and QDRII+ SRAM memory interface design process.
IP Cores and Reference Designs
Table 4 lists QDRII SRAM controller intellectual property (IP) cores and reference designs available from Altera.
| Table 4. QDRII SRAM IP Cores and Reference Designs |
| Controller Name |
Free Evaluation |
Vendor |
Devices Supported |
| QDRII SRAM Controller MegaCore® Function |
Yes |
Altera |
Stratix III, Stratix II, Stratix II GX,
Stratix, Stratix GX |
Development Kits and Hardware Reference Platforms
Table 5 lists memory hardware reference platforms available from Altera. The Gerber files, layout, termination recommendations, and signal integrity analysis information of these reference platforms are also available.
| Table 5. QDRII SRAM Development Kits and Hardware Reference Platforms |
| Board Name |
Vendor |
Contact Information |
| QDRII SRAM Stratix Memory Reference Platform |
Altera |
Contact Altera or your local Altera FAE |
QDRII SRAM Vendors
Related Links
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