Weave and Skew
By Dr. Eric Bogatin
www.BeTheSignal.com
April 2007
The use of high-speed serial links in excess of 2.5 Gbps has accelerated since the turn of this century. Design principles for differential impedance, via stubs, conductor losses, and dielectric losses have been well established. New manufacturing technologies such as compensation and backdrilling overcome many of the limitations of vias. Silicon signal processing technologies, based on pre-emphasis and equalization, overcome losses and are migrating into the mainstream. However, there remains another significant stumbling block to the advance of high-speed serial links.
At DesignCon 2007 (1), Intel Corporation presented the results from their study on the intra-line skew in a differential pair due to the local variation of the dielectric constant, which results from the glass weave structure in a circuit board. After more than 58,000 measurements of test structures, they concluded that a rough estimate of the worst-case intra-line skew might be on the order of 15 psec per inch. This study continues the work they presented in 2004 (2) and confirms the study by Teraspeed and Teradyne from DesignCon 2005 (3).
The differential pair that transports all high-speed serial links is composed of two independent transmission lines, with some degree of coupling. In principle, a differential signal is launched into the pair and the differential pair transmits this differential signal while still maintaining it as a pure differential signal.
In the real world, any asymmetry, anywhere in the link, converts some of the differential signal into a common signal component. This means less differential signal at the receiver, which contributes to intersymbol interference and collapse of the eye.
This mode conversion can be caused from a rise and fall time difference in the drivers, a time-delay skew between the drivers, impedance mismatch of the drivers and each line, or asymmetrical vias or test pads.
Attention is usually focused on routing the lines that make up the differential pair to keep their lengths matched. However, even with perfect length matching, there is a hidden source of skew: local variation in the dielectric constant, and hence, propagation speed for the signals in each line of a pair. The problem of intra-line skew arises from the nonuniform distribution of resin and glass fiber that make up most PCBs. Figure 1 shows an example of the local variation of dielectric materials (photo courtesy of Intel Corporation).
Figure 1. Local Variation in the Dielectric Properties Seen by the Two Lines in a Differential Pair
This variation arises from the local mix of glass weave with a Dk of about 6, unevenly distributed in the resin matrix, with a Dk of about 3.5.
In June of 2005, Intel initiated a Fiberweave Work Group to “define Intel’s short-and long-term strategies for dealing with the negative signal integrity effects of fiberweave.” Over the years, various groups at Intel made over 58,000 TDR measurements on hundreds of test boards to quantify the skew. The measured skew between 4-inch lines was typically 0-10 psecs per inch, but a small percentage had up to 15 psecs per inch, which is the value Intel adopted as its “representative worst-case scenario.” This corresponds to a local variation in the dielectric constant of 0.8 out of an average value of 4.5. Figure 2 shows the distribution of measured skews (figure courtesy of Intel Corporation).
Figure 2. Measured Distribution of Skew, in psecs, for 4-Inch Long Test Lines
At 5 Gbps, the bit rate for PCI-Express- Gen II, the unit interval is only 200 psec. In a 5-inch interconnect, the skew could be 75 psecs, a significant fraction of the UI, resulting in additional collapse of the eye and deterministic jitter. In a 15-inch interconnect, the intra-line skew can result in total collapse of the eye and no differential signal at the receiver.
The Intel Work Group investigated and presented 17 different mitigation techniques to minimize the impact of intra-line skew, considering material costs, design engineering time, and effectiveness. These techniques included rotating the artwork 10 degrees to the weave axis, adding small jogs in each line to shift the lines off from a weave bundle, and using lower dielectric constant glass.
“Our study was not meant to be the final word on solving the skew problem,” Jeff Loyer, project lead, said, “but to raise visibility in the industry about this potential problem so that clever engineers can start thinking about practical solutions.”
References
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“Fiber Weave Effect: Practical Impact Analysis and Mitigation Strategies,” Jeff Loyer, Richard Kunze and Xiaoning Ye, Proceedings of DesignCon 2007.
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“Glass weave Reinforcement Patterns,” Gary Brist, Bryce Horne and Gary Long, Printed Circuit Design and Manufacture Magazine, Nov 2004
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“ The Impact Of PCB Laminate Weave On The Electrical Performance Of Differential Signaling At Multi-Gigabit Data Rates,” Scott McMorrow and Chris Heard, DesignCon East 2005.
This and other signal integrity topics are covered in Eric’s public classes and online lectures, available from his website, www.BeTheSignal.com. Send your signal integrity technical questions to DoctorIsIn@BeTheSignal.com.
Bio: Eric Bogatin is president of Bogatin Enterprises. Many of his papers are available on his website, www.BeTheSignal.com. He is the author of Signal Integrity - Simplified, published by Prentice Hall.
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