Silicon technology innovations at 20 nm and 14 nm allow for both high-density design and power-efficient systems. This provides the opportunity to integrate larger and more sophisticated silicon functionality into single monolithic die, as well as into multichip 3D silicon devices.
Multiple System Capabilities, One Device
The best design for your optimized digital system may use programmable logic, hardened intellectual property (IP), microprocessors, digital signal processors, or any combination of these. Using more than one of these technologies requires multiple design flows, design processes, and the final step of integrating and testing this heterogeneous processing system.
A combination of the market forces and constraints mentioned above, as well as both planned and disruptive silicon technologies within and outside Moore’s law, are now enabling classes of silicon devices and system-on-a-chip (SoC) solutions that integrate one or more of these technologies into a single monolithic or, in some cases, multichip solution. When examining each of these individual silicon-processing technologies, their overall technology roadmaps, and the economics of scale required to integrate multiple technologies, programmable logic companies are best suited to provide for these converged silicon capabilities and tool flows. Altera’s advantages in this area include design methodologies based on IP reuse, broad silicon product adoption across several markets, and highly leveraged partnerships with world-class manufacturing partners and IP providers. These advantages are enabled through Altera’s partnerships with providers of electronic design automation (EDA) software for first access to 14 nm and 20 nm design software, manufacturers of DRAM and other memory providers, licensing of ARM® hard embedded processors, standards bodies for emerging memory technologies like Hybrid Memory Cube and design entry capabilities like OpenCL, and emerging optical internetworking bodies and forums.
Enabling Silicon Convergence
Converging each of these technologies into one usable solution is enabled at 14 nm and 20 nm through a variety of software and hardware technologies. The first of these are system design tools such as Qsys, as well as OpenCL compilers, reference designs, and IP. Altera has been an industry leader in developing design tool innovations within Quartus® II software such as SOPC Builder and DSP Builder, enabled by a long-time vision of silicon convergence and commitment to enabling customers to take advantage of “More than Moore.”
Also enabling silicon convergence is silicon-stacking technology using interposers and through silicon vias. These technologies enable heterogeneous silicon systems that use different die fabrication technologies and optimizations, as well as highly differentiated mixed system solutions. Some examples include direct low-latency connections to microprocessors, optical communication modules, dense memory blocks, and user-optimized HardCopy® custom ASICs.
Delivering on the Promise of Convergence
Altera will follow up this technology discussion with an announcement about product family offerings in 14 nm and 20 nm technology. Altera’s work to further enable silicon convergence is intended to help designers develop their own technologies and product roadmaps. By focusing on the mixed-system fabric’s ability to capture, integrate, and reuse current technology in future systems, designers can spend more time developing the features that make their systems distinctive and differentiated.
