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Accelerating Software Using the Nios II C2H Compiler (IEMB240)
8 Hours Instructor-Led Course

Course Description

This course will teach you how to accelerate your Nios® II 7.2 software using the Nios II C-to-Hardware Acceleration (C2H) Compiler. The Nios II C2H Compiler converts performance-critical C subroutines into seamlessly integrated hardware accelerators that are automatically linked into the Nios II software build flow. You will learn to assess performance bottlenecks in your system & how to apply the Nios II C2H Compiler to overcome them. It will show you where the Nios II C2H Compiler works best and where it is not as applicable. It covers not only how to drive the tool but how to analyze your design at the system level in order to optimally architect software & hardware partitions. You will download, run, and accelerate your code running on a Nios II processor inside an Altera® FPGA.

At Course Completion

  • Create a software project in the Nios II IDE
  • Download and run software on a board you configured with the Nios II processor
  • Analyze the system performance and determine where bottlenecks exist
  • Assess the architectural features of your design that may be limiting performance
  • Ascertain where C2H may be able to help you re-write software code so that it is C2H-friendly
  • Run the C2H compiler on selected blocks of code
  • Increase your overall system performance using C2H

Prerequisites

We recommend completing the following courses:

Skills Required

  • C programming skills are required for this class, preferably knowledge of programming in C for embedded systems.
  • The "Designing with the Nios II Processor and SOPC Builder" and "Developing Software for the Nios II Processor" classes are recommended pre-requisites
  • Working knowledge of the Quartus® II design software is also preferred as well as a basic understanding of FPGAs.

Applicable Training Curriculum

This course is part of the following Altera training curriculum:

No class is being offered at this time

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