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PROFIBUS Slave Subsystem for Altera FPGA

The PROFIBUS DP Slave Subsystem for Altera FPGA offers a PROFIBUS DP Slave IP Core and Communication Processor for Integrating PROFIBUS DP into field devices.

Adaptation to the application requirements is made easy by extensive configuration options. Softing‘s consulting, integration, and pre-certification services allow for risk-free implementation. A large choice of supported FPGA families and sizes helps focus on the application rather than the communication.

The subsystem supports slave redundancy and optional line redundancy while reaching cycle times down to 100 μs

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Key Features

  • No porting of the PROFIBUS protocol software required
  • PROFIBUS IP Core with up to 12 Mbit/s
  • PROFIBUS DP-V0, DP-V1
  • Support of slave redundancy
  • Optional line redundancy
  • Simple addition of further protocols due to unified API
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Offering Brief

Offering Brief

Device Family Cyclone® III FPGA, Cyclone® V SE SoC FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® 10 LP FPGA, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Cyclone® V GX FPGA, Cyclone® IV E FPGA
Offering Status Production
Integrated Testbench No
Evaluation License Yes
Design Examples Available Yes
Demo No
Compliance Yes
Compliance Link Compliance Link
Latest Quartus Version Supported 23.1.0
Development Language C/C++, Encrypted VHDL, VHDL

Development and integration package

Sample integration and application

Ordering Information

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from EDA/IDE/Software

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