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100 Gbit/s IEEE 802.3bj RS Encoder/ Decoder

The Creonic IP cores are the ideal solution for throughputs beyond 10 Gbit/s for FPGA devices and throughputs of up to 100 Gbit/s on state-of-the-art ASIC technologies.

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100G UDP IP Stack

Logic Fruit’s 100G UDP IP Stack – Optimized for high-speed 100G data transfer with minimal CPU dependency. Fully supports ARP and ICMP for reliable network connectivity and easy integration into SoC designs

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10G UDP Offloading Engine (UDP10G-IP)

UDP Offloading Engine IP core is a pure hardware logic solution with no CPU involvement. The UDP10G-IP is ideal for high-performance data transmission or broadcasting over network. This IP product includes a reference design, helping reduce both development time and cost.

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10GBASE-R PHY FPGA IP

The 10GBASE-R PHY FPGA Intellectual Property (IP) core can be used with either Altera FPGA IP for 10G Ethernet MAC or with a customer-developed Ethernet MAC via a standard XGMII interface running at 156.25 Mbps.

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10GbE TCP Offloading Engine IP core (TOE10G-IP)

10GbE TCP Offloading Engine (TOE10G) IP core is the epochal solution implemented without CPU. Typically, TCP/IP stack consumes high valuable resource of CPU workloads. With its pure hardware logic, TOE10G IP can entirely take over the TCP/IP stack operation with high proven throughput for 10GbE communication.

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10M/100M/1G/10G/25G High capacity Ethernet TSN Switch

The 10M/100M/1G/10G/25G/100G Ethernet Switching IP is an advanced Ethernet Switch IP with an extensive set of QoS features, statistics and Time Sensitive Networking (TSN) capabilities.

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1G UDP Offloading Engine (UDP1G-IP)

UDP Offloading Engine IP core is a pure hardware logic solution with no CPU involvement. The UDP1G-IP is ideal for high-performance data transmission or broadcasting over network. This IP product includes a reference design, helping reduce both development time and cost.

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1G/10Gb Ethernet PHY FPGA IP

The 1G/10G Ethernet PHY Altera FPGA Intellectual Property (IP) core supports functionality of both the standard physical coding sublayer (PCS) and the higher data rate 10G PCS with an appropriate physical medium attachment (PMA). 

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1GbE TCP Offloading Engine IP core (TOE1G-IP)

The TCP Offloading Engine (TOE1G) IP core is an innovative, CPU-free solution for TCP/IP processing. Traditionally, TCP handling is complex and requires expensive high-end CPUs. TOE1G-IP offloads all TCP/IP functions to pure hardware logic, enabling high-speed performance without software overhead.

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