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Clocks, PLLs and Resets
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JESD204B TRANSMITTER AND RECEIVER IP

Logic Fruit's JESD204B RTL IP supports increased lane rates up to 12.5Gbps for higher bandwidth applications. It can be configured to transmit or receive using a 8B10B link layer to achieve deterministic latency, SerDes synchronization, clock recovery and DC balance.

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JESD204C TRANSMITTER AND RECEIVER IP

Logic Fruit's JESD204C RTL IP supports increased lane rates upto 32Gbps for higher bandwidth applications. This IP can be configured to transmit or receive using either a 64B66B or 8B10B link layer with improved efficiency of payload delivery, and also provides for an improved robustness of the link with a backward-compatible option to JESD204B.

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LVDS Tunneling Protocol and Interface IP

LVDS Tunneling Protocol and Interface (LTPI) is a soft IP introduced in the DC-SCM 2.0 specification to facilitate the tunneling of low-speed signals between the host platform module (HPM) and secure control module (SCM) through the low-voltage differential signaling (LVDS) interfaces.

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Optical Transport

We offer both OTN applications, such as Add/Drop Multiplexer (ADM), Muxponders, Transponders, Regenerators etc, for speeds from 1Gbps to 1.6 Tbps. Client support of Ethernet, Fibre Channel, OTN, SONET, and SDH. Line support of FlexO and OTU.Including all overhead processing, synchronization, software API / SDK

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PCIe GEN6 Controller IP

The PCIe Gen 6 Controller IP supports the full PCI Express 6.x specification, offering scalable, high-speed communication for enterprise-grade solutions. FIRST in the industry to deliver PCIe IPs across multiple generations. It is: - Optimized for existing and emerging FPGA uses cases for hardening onto ASIC / SoC. - Best for large memory, compute-intensive and high data rate applications.

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PCIe GEN6 PHY IP

Logic Fruit's PCIe GEN6 PHY IP achieves data rates up to 64GT/s per lane with PAM4 signaling thereby delivering reliable performance for high-speed data transfer. It supports advanced applications, including AI/ML, High-Performance Computing, and next-generation storage solutions.

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Precision Timing Solutions

SiTime is the precision timing company. Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. Precision timing is increasingly crucial for high-performance applications demanding microsecond- to nanosecond-level accuracy, including AI data centers, aerospace and defense platforms, and advanced driver-assistance systems (ADAS).

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SATA 3 Controller IP

Logic Fruit's SATA 3 Controller IP enables fast and efficient connectivity for storage devices, supporting high-speed data transfer. It works seamlessly with both newer and older SATA interfaces.

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XAUI PHY FPGA IP

The XAUI PHY IFPGA IP core allows you to easily build systems with a very high throughput 10G Ethernet connection. This XAUI PHY along with a 10GbE media access control (MAC) IP core enables an Altera FPGA to interface to a 10GbE network through a variety of external devices, including a 10GbE PHY device or optical transceiver module. You can implement the XAUI PHY in hard silicon in Intel's 65 nm and 40 nm FPGAs with serial transceivers faster than 3 Gbps. The PHY management functions are implemented in soft IP. In Intel 20 nm and beyond FPGA families, a XAUI PHY can be implemented in soft IP.

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Showing 10-18 of 18 Offerings