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NAND Flash Controller

The iWave NAND Flash Controller IP Core enables efficient and secure access to SLC and MLC NAND memory with built-in ECC, bad block management, and wear-leveling. It is ideal for FPGA-based storage, boot, and logging applications requiring high data integrity and flexibility.

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NVMe Controller (Silicon Proven IP for Altera Devices)

The NVMe Controller is a configurable and UNH-certified solution for enterprise and client PCIe SSDs, featuring multi-core and lock-free architecture. It includes NVMe-aware DMA engines, firmware-controlled command handling, and supports AXI and proprietary interfaces. Integrated with Mobiveil’s GPEX or third-party NAND controllers, it achieves optimized latency, throughput, and efficiency.

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NVME SAN IP

Storage Area Network on FPGA over 10G/25G/50G/100G/200G/400GbE and NVMe SSD Gen2/Gen3/Gen4/Gen5

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SD / SDIO Host Controller 3.0

iWave’s SD/SDIO Host Controller 3.0 is a versatile IP core that enables efficient communication between embedded systems and SD/SDIO devices. With support for a wide range of SD card types and high-speed data transfer modes, it offers a reliable solution for applications requiring fast and secure data storage interfaces.​

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SD Express IP Core

iWave’s SD Express IP Core enables efficient data transfer between host processors and SD Express storage devices, supporting PCIe Gen3 x1 interface and UHS-II/III modes. With its high-speed data transfer capabilities and seamless integration into FPGA-based systems, it offers a reliable solution for applications requiring fast and secure data storage interfaces.

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SD Memory Slave Controller

iWave’s SD Memory Slave Controller IP Core enables FPGAs to interface with SD memory cards in slave mode, compliant with SD Physical Layer Spec v2.0. With SPI and SD mode support, it is ideal for embedded systems requiring removable storage with minimal overhead.

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SDHC Controller

SDHC Card Interface Controller

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Stealth AES Encryption IP

Stealth AES IP is Pantherun’s key-exchange-free encryption engine, designed to protect against MITM, replay, and side-channel attacks, while providing post-quantum resistance for secure, future-proof communication

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xSPI-MC: xSPI, HyperBus™, and Xccela™ Serial Memory Controller

The xSPI-MC is a versatile memory controller supporting JEDEC xSPI, HyperBus™, and Xccela™ standards, as well as proprietary SPI protocols for Flash and PSRAM. It enables easy device detection, direct boot, and operation in multiple modes: Slave (AHB slave access), DMA (with internal DMA engine), Access In-Place (AIP) via AHB/AXI, and Boot-Image copy after reset. Compatible with single to 16x SPI devices, it offers flexible configuration through registers or an auto-configuration feature using a device list. Highly customizable via Verilog defines, it allows selection of DMA, auto-configuration, and device count. Delivered with a synthesizable soft-PHY, it is FPGA/ASIC ready and requires no process-specific dependencies.

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Showing 10-18 of 18 Offerings