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Altera Solutions Intellectual Property (IP) Digital Signal Processing / AI Artificial Intelligence Error Correction Filters /Transforms Floating Point Modulation Video and Image Processing Interfaces Audio / Video Communication Compute Express Link (CXL) Ethernet High Speed Networking / Security PCI Express (IP) Serial Memory Controllers DMA Flash SDRAM SRAM Soft Embedded Processors RISC V Transceivers & Basic Functions Clocks, PLLs and Resets Simulation, Debug and Verification Transceivers Altera Solutions
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3D LUT Altera® FPGA IP

The 3D Look-Up Table (LUT) Altera® FPGA IP, part of the Video and Vision Processing (VVP) Suite, delivers a high-performance, resource-efficient solution for video color space conversion, dynamic range adjustment, chroma keying, and artistic effect generation, enabling superior image quality in broadcast and professional video applications.

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40G Ethernet MAC and PHY FPGA IP

The 40G Ethernet MAC and PHY FPGA IP core offers IEEE 802.3ba-2010. 40 Gbps Ethernet is an industry standard and is compliant for media access control (MAC) and PHY (PCS+PMA) functions. It enables an FPGA to interface to another device over a copper or optical transceiver module.

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50G Ethernet FPGA IP

The 50G Ethernet FPGA IP core implements the 25G & 50G Ethernet Specification, Draft 1.4 from the 25 Gigabit Ethernet Consortium and the IEEE 802.3by 25Gb Ethernet draft. The IP core provides standard media access control (MAC), physical coding sublayer (PCS), and PMA functions. The PHY comprises the PCS and PMA.

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5G LDCPC-V FPGA IP

Low-density parity-check (LDPC) IP helps transmit and receive messages over noisy channels. This IP implements LDPC codes compliant with the 3rd generation partnership project 5G specification.

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CIC FPGA IP Core

The CIC FPGA IP core offers computationally efficient cores for extracting baseband signals.

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CPRI FPGA IP

Altera CPRI FPGA IP delivers a high-performance, standards-compliant implementation of the CPRI Specification V7.0, enabling reliable, high-speed communication between Radio Equipment Controllers (RECs) and Remote Radio Equipment (REs). Fully configurable as either REC or RE, the IP simplifies integration in remote radio network applications and accelerates deployment of robust, low-latency fronthaul links.

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DDR5 and DDR4, LPDDR5 and LPDDR4 External Memory Interfaces FPGA IP

DDR4 and DDR5 offer higher bandwidth and improved performance over previous generations, with DDR5 providing further enhancements in speed and power efficiency. LPDDR4 and LPDDR5 are optimized for low power consumption, making them ideal for embedded applications, with LPDDR5 offering even faster data rates and improved energy management. When integrated with Altera FPGAs these memory technologies enable faster data processing and more efficient power usage for a wide range of applications including networking, cloud and edge.

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FFT FPGA IP Cores

The Fast Fourier transform (FFT) FPGA intellectual property (IP) core is a high-performance, highly parameterizable FFT processor.

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FIR II FPGA IP Core

The FIR II IP cores provide a fully-integrated finite impulse response (FIR) filter function optimized for use with Altera FPGA devices.

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Showing 1-9 of 24 Offerings