- Stratix 10
- Stratix V E
- Stratix V GT
- Stratix V GS
- Stratix V GX
- Arria 10 SX
- Arria 10 GT
- Arria 10 GX
- Arria V ST SoC
- Arria V SX SoC
- Arria V GT
- Arria V GX
- Arria V GZ
- Cyclone 10 GX
- Cyclone V SE SoC
- Cyclone V ST SoC
- Cyclone V SX SoC
- Cyclone V E
- Cyclone V GT
- Cyclone V GX
- MAX 10
- MAX V
Quartus Prime Software Versions
Issues marked as Active in chosen release will be shown (found in earlier and not fixed, or found in)
- v16.0 Update 2
- v16.0 Update 1
... How do I add Intel® Stratix® 10 L-Tile and H-Tile device transceiver
PMA assignments to my QSF file? Description. You ...
... Can I use a transceiver RX Pin as a Tx PLL REFCLK for the HDMI Design
Example transmitter interface (Source) on Arria 10 and Cyclone 10 ...
... Why does the IEEE 1149.6 JTAG testing fail when using pre-configuration
BSDL files on transceiver I/O pins? Description. ...
... Found: v13.1. Internal Error: Sub-system: HSSI, File: /quartus/periph/hssi/
hssi_module_av.cpp, Line: 6805. Description. Due to ...
... Why does Arria 10 Transceiver Toolkit (TTK) fail to find any PCIe transceiver
links in Quartus Prime software 16.0? Description. ...
... Last Modified: April 28, 2014. How do I launch Transceiver Toolkit without
launching the Quartus II software first? Description. ...
... Why cant I run the Transceiver Toolkit Auto sweep feature for VOD values of
lower than 6 in the Quartus II Software, versions 12.0 and later? ...
... Error (175020): Illegal constraint of HSSI PMA Aux ... occurs because the Quartus
II software does not correctly restrict transceiver calibration resources ...
... Description. The EPE for transceiver based devices has an I/O count based
on general purpose I/O (GPIO) and transceiver (HSSI) pins combined. ...
... How should you connect power, ground (gnd), and input signals on unused
High Speed Serial Interface (HSSI) Transceivers (XCVR)s? Description. ...