ALTERA DOES NOT WARRANT THAT THE FUNCTIONS CONTAINED IN THIS PATCH
WILL MEET YOUR REQUIREMENTS, OR THAT THE OPERATION OF THIS PATCH
WILL BE UNINTERRUPTED OR ERROR-FREE.

//****************************************************************
quartus-12.0-0.dp2-readme.txt
Readme file for Quartus II 12.0 Patch 0.dp2
Copyright (C) Altera Corporation 2012 All right reserved.
Patch created on June 20 2012
Patch case#: 59748
//****************************************************************

Please note, this patch is meant to address known software issues for
Stratix V, Arria V, and Cyclone V devices in the Quartus II software
version 12.0.

The device patches are cumulative.

======================================
The following were addressed in 0.dp2:
======================================
--------------------
Issue 1 (case 51043)
--------------------
This patch adds 10G PCS 1588 mode support for Stratix V devices.

--------------------
Issue 2 (case 53864)
--------------------
This patch adds DDR3 x4 support for Stratix V ES devices.  
The support is under INI control. Please contact Altera if you need
this feature.

--------------------
Issue 3 (case 55381)
--------------------
This patch adds the PMA direct mode SOF/POF support for Stratix V
devices

--------------------
Issue 4 (case 57508)
--------------------
There is an issue with the offset cancellation IP within the
reconfiguration controller for Stratix V.  After the offset
cancellation IP runs, the tx_digital_reset will be stuck deasserted,
and users will not be able to control the tx_digital_reset.  Because
the offset cancellation IP is required for all designs, all users will
be affected by this.

This patch addresses the problem, and users will be able to control
the tx_digital_reset properly with the patch.

--------------------
Issue 5 (case 57721)
--------------------
Internal Error: Sub-system: MAST,
File: /quartus/synth/mast/mast_mux.cpp, Line: 3454

This patch fixes the Internal Error in the multiplexer restructuring
algorithm in synthesis.

--------------------
Issue 6 (case 57899)
--------------------
This patch fixes an issue that prevented the EthernetBlaster II cable
from successfully configuring Stratix V devices.

--------------------
Issue 7 (case 58458/58467)
--------------------
This patch provides testbench BFM for simulation of PCIe Hard IP in
all 28nm devices.

This patch also fixes the following errata in 12.0:
"The Arria V and Cyclone V Hard IP for PCI Express IP Cores do not
downtrain to x1 from a x4 or x8 configurations."

--------------------
Issue 8 (case 58564)
--------------------
According to the Arria V data sheet, the Fmin for PMA-PLD is 50MHz.
Arria V GT implements 64-bit and 80-bit PMA Direct mode.  The correct
supported minimum data rate for 64-bit is 3.2 Gbps and 80-bit is 4.0
Gbps.  In 12.0 release, it supports down to 611 Mbps.

This patch fixes the issue.


Caution - You must either have previously installed the
          Quartus II 12.0 software or must
          install the Quartus II 12.0 software
          before installing this patch. Otherwise, the patch will
          not be installed correctly and the Quartus II
          software will not run properly.