AN 687: Implementing QPI Using the Transceiver Native PHY IP Core in Stratix V Devices

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ID 683888
Date 12/17/2015
Public
Document Table of Contents
Document Table of Contents x
1. Implementing QPI Using the Transceiver Native PHY IP Core in Stratix V Devices
1. Implementing QPI Using the Transceiver Native PHY IP Core in Stratix V Devices x
1.1. QPI Overview 1.2. Using the Native PHY IP Core for QPI 1.3. Document Revision History
1.2. Using the Native PHY IP Core for QPI x
1.2.1. Setting the Transmitter Driver to Tri-State
1. Implementing QPI Using the Transceiver Native PHY IP Core in Stratix V Devices

1. Implementing QPI Using the Transceiver Native PHY IP Core in Stratix V Devices

This application note describes how to implement the Intel® QuickPath Interconnect (QPI) protocol with Altera® transceivers in the Stratix® V devices. Designers can create the QPI interface design using FPGA logic to interface with the transceiver configurations described in this document.

Stratix V Native PHY IP cores provide an easy and efficient method to implement the QPI protocol.


Section Content
QPI Overview
Using the Native PHY IP Core for QPI
Document Revision History

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